[Qemu-commits] [COMMIT 1e99e84] target-mips: proper sign extension for 'SUBU rd, zero, rt'

[Anthony Liguori]

From: Aurelien Jarno <address@hidden>

Signed-off-by: Aurelien Jarno <address@hidden>

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 2c163e0..7ecc9fd 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -1604,6 +1604,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, 
uint32_t opc,
             tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]);
         } else if (rs == 0 && rt != 0) {
             tcg_gen_neg_tl(cpu_gpr[rd], cpu_gpr[rt]);
+            tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]);
         } else if (rs != 0 && rt == 0) {
             tcg_gen_mov_tl(cpu_gpr[rd], cpu_gpr[rs]);
         } else {