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Re: [PATCH 07/11] hw/ppc/e500: Implement pflash handling
From: |
Bin Meng |
Subject: |
Re: [PATCH 07/11] hw/ppc/e500: Implement pflash handling |
Date: |
Fri, 16 Sep 2022 23:00:06 +0800 |
On Thu, Sep 15, 2022 at 11:36 PM Bernhard Beschow <shentey@gmail.com> wrote:
>
> Allows e500 boards to have their root file system reside on flash using
> only builtin devices.
>
> Note that the flash memory area is only created when a -pflash argument is
> given, and that the size is determined by the given file. The idea is to
> put users into control.
>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
> docs/system/ppc/ppce500.rst | 12 +++++++++
> hw/ppc/Kconfig | 1 +
> hw/ppc/e500.c | 54 +++++++++++++++++++++++++++++++++++++
> 3 files changed, 67 insertions(+)
>
> diff --git a/docs/system/ppc/ppce500.rst b/docs/system/ppc/ppce500.rst
> index ba6bcb7314..c3f55c6f3d 100644
> --- a/docs/system/ppc/ppce500.rst
> +++ b/docs/system/ppc/ppce500.rst
> @@ -119,6 +119,18 @@ To boot the 32-bit Linux kernel:
> -initrd /path/to/rootfs.cpio \
> -append "root=/dev/ram"
>
> +Rather than using a root file system on ram disk, it is possible to have it
> on
> +emulated flash. Given an ext2 image whose size must be a power of two, it can
> +be used as follows:
> +
> +.. code-block:: bash
> +
> + $ qemu-system-ppc64 -M ppce500 -cpu e500mc -smp 4 -m 2G \
qemu-system-ppc{64|32}
> + -display none -serial stdio \
> + -kernel vmlinux \
> + -drive if=pflash,file=/path/to/rootfs.ext2,format=raw \
> + -append "rootwait root=/dev/mtdblock0"
> +
> Running U-Boot
> --------------
>
> diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
> index 791fe78a50..769a1ead1c 100644
> --- a/hw/ppc/Kconfig
> +++ b/hw/ppc/Kconfig
> @@ -126,6 +126,7 @@ config E500
> select ETSEC
> select GPIO_MPC8XXX
> select OPENPIC
> + select PFLASH_CFI01
> select PLATFORM_BUS
> select PPCE500_PCI
> select SERIAL
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index 864b6f3d92..7843a4e04b 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -23,8 +23,10 @@
> #include "e500-ccsr.h"
> #include "net/net.h"
> #include "qemu/config-file.h"
> +#include "hw/block/flash.h"
> #include "hw/char/serial.h"
> #include "hw/pci/pci.h"
> +#include "sysemu/block-backend-io.h"
> #include "sysemu/sysemu.h"
> #include "sysemu/kvm.h"
> #include "sysemu/reset.h"
> @@ -267,6 +269,34 @@ static void sysbus_device_create_devtree(SysBusDevice
> *sbdev, void *opaque)
> }
> }
>
> +static void create_devtree_flash(SysBusDevice *sbdev,
> + PlatformDevtreeData *data)
> +{
> + char *name;
Use g_autofree
> + uint64_t num_blocks = object_property_get_uint(OBJECT(sbdev),
> + "num-blocks",
> + &error_fatal);
> + uint64_t sector_length = object_property_get_uint(OBJECT(sbdev),
> + "sector-length",
> + &error_fatal);
> + uint64_t bank_width = object_property_get_uint(OBJECT(sbdev),
> + "width",
> + &error_fatal);
> + hwaddr flashbase = 0;
> + hwaddr flashsize = num_blocks * sector_length;
> + void *fdt = data->fdt;
> +
> + name = g_strdup_printf("%s/nor@%" PRIx64, data->node, flashbase);
> + qemu_fdt_add_subnode(fdt, name);
> + qemu_fdt_setprop_cell(fdt, name, "#address-cells", 1);
> + qemu_fdt_setprop_cell(fdt, name, "#size-cells", 1);
#address-cells and #size-cells are not needed.
> + qemu_fdt_setprop_string(fdt, name, "compatible", "cfi-flash");
> + qemu_fdt_setprop_sized_cells(fdt, name, "reg",
> + 1, flashbase, 1, flashsize);
> + qemu_fdt_setprop_cell(fdt, name, "bank-width", bank_width);
> + g_free(name);
> +}
> +
> static void platform_bus_create_devtree(PPCE500MachineState *pms,
> void *fdt, const char *mpic)
> {
> @@ -276,6 +306,8 @@ static void
> platform_bus_create_devtree(PPCE500MachineState *pms,
> uint64_t addr = pmc->platform_bus_base;
> uint64_t size = pmc->platform_bus_size;
> int irq_start = pmc->platform_bus_first_irq;
> + SysBusDevice *sbdev;
> + bool ambiguous;
>
> /* Create a /platform node that we can put all devices into */
>
> @@ -302,6 +334,13 @@ static void
> platform_bus_create_devtree(PPCE500MachineState *pms,
> /* Loop through all dynamic sysbus devices and create nodes for them */
> foreach_dynamic_sysbus_device(sysbus_device_create_devtree, &data);
>
> + sbdev = SYS_BUS_DEVICE(object_resolve_path_type("", TYPE_PFLASH_CFI01,
> + &ambiguous));
Can this be moved into sysbus_device_create_devtree(), and use the
same logic as the eTSEC device?
> + if (sbdev) {
> + assert(!ambiguous);
> + create_devtree_flash(sbdev, &data);
> + }
> +
> g_free(node);
> }
>
> @@ -856,6 +895,7 @@ void ppce500_init(MachineState *machine)
> unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4};
> IrqLines *irqs;
> DeviceState *dev, *mpicdev;
> + DriveInfo *dinfo;
> CPUPPCState *firstenv = NULL;
> MemoryRegion *ccsr_addr_space;
> SysBusDevice *s;
> @@ -1024,6 +1064,20 @@ void ppce500_init(MachineState *machine)
> pmc->platform_bus_base,
> sysbus_mmio_get_region(s, 0));
>
> + dinfo = drive_get(IF_PFLASH, 0, 0);
> + if (dinfo) {
> + BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
> + BlockDriverState *bs = blk_bs(blk);
> + uint64_t size = bdrv_getlength(bs);
> + if (ctpop64(size) != 1) {
> + error_report("Size of pflash file must be a power of two.");
> + exit(1);
> + }
I think we should also check whether the flash size plus the eTSEC
size exceeds the platform bus mmio window size otherwise it won't work
for both devices present, no?
> + pflash_cfi01_register(pmc->platform_bus_base, "e500.flash",
> + size, blk,
> + 64 * KiB, 2, 0x89, 0x18, 0x0000, 0x0, 1);
> + }
> +
> /*
> * Smart firmware defaults ahead!
> *
Regards,
Bin
- Re: [PATCH 02/11] hw/gpio/meson: Introduce dedicated config switch for hw/gpio/mpc8xxx, (continued)
- [PATCH 03/11] docs/system/ppc/ppce500: Add heading for networking chapter, Bernhard Beschow, 2022/09/15
- [PATCH 04/11] hw/ppc/mpc8544ds: Add platform bus, Bernhard Beschow, 2022/09/15
- [PATCH 06/11] hw/block/pflash_cfi01: Error out if device length isn't a power of two, Bernhard Beschow, 2022/09/15
- [PATCH 07/11] hw/ppc/e500: Implement pflash handling, Bernhard Beschow, 2022/09/15
- Re: [PATCH 07/11] hw/ppc/e500: Implement pflash handling,
Bin Meng <=
- [PATCH 09/11] hw/sd/sdhci: Rename ESDHC_* defines to USDHC_*, Bernhard Beschow, 2022/09/15
- [PATCH 08/11] hw/sd/sdhci-internal: Unexport ESDHC defines, Bernhard Beschow, 2022/09/15
- [PATCH 10/11] hw/sd/sdhci: Implement Freescale eSDHC device model, Bernhard Beschow, 2022/09/15