Re: [PATCH v6 07/20] hw/block/nvme: fix pin-based interrupt behavior

[Keith Busch]

On Thu, May 14, 2020 at 06:45:58AM +0200, Klaus Jensen wrote:
> From: Klaus Jensen <address@hidden>
> 
> First, since the device only supports MSI-X or pin-based interrupt, if
> MSI-X is not enabled, it should not accept interrupt vectors different
> from 0 when creating completion queues.
> 
> Secondly, the irq_status NvmeCtrl member is meant to be compared to the
> INTMS register, so it should only be 32 bits wide. And it is really only
> useful when used with multi-message MSI.
> 
> Third, since we do not force a 1-to-1 correspondence between cqid and
> interrupt vector, the irq_status register should not have bits set
> according to cqid, but according to the associated interrupt vector.
> 
> Fix these issues, but keep irq_status available so we can easily support
> multi-message MSI down the line.

Looks good.

Reviewed-by: Keith Busch <address@hidden>