On Thu, Apr 30, 2020 at 08:48:31AM +0200, Philippe Mathieu-Daudé wrote:
Cc'ing IPMI maintainer.
On 4/29/20 4:00 PM, Gerd Hoffmann wrote:
x86 machines can have a single ISA bus only.
I disagree with the comment.
Machines can have multiple ISA bus.
Note *x86* machines. Given x86 has a global io address space I still
think this is true.
On some !x86 archs where a mmio window on the bridge is used for the io
address space multiple isa busses are possible. I'm not sure whenever
this is purely theoretical or whenever such machines exist in practice
and in case of the latter whenever qemu can emulate one.