Re: Troubleshooting Data Abort Error While Debugging U-Boot on mcimx6ul-evk in QEMU

[Peter Maydell]

On Tue, 3 Sept 2024 at 08:20, Guy <guyqqcom@qq.com> wrote:
>
> I got the exe from a repository on gitee.com.  But there is no source code.
> Furthermore, I see the A7MPCORE in the fsl-imx6ul.c of the qemu source code:
>
> C
>
> /*
>      * A7MPCORE
>      */
>     object_property_set_int(OBJECT(&s->a7mpcore), "num-cpu", 1, &error_abort);
>     object_property_set_int(OBJECT(&s->a7mpcore), "num-irq",
>                             FSL_IMX6UL_MAX_IRQ + GIC_INTERNAL, &error_abort);
>     sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort);
>     sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, 
> FSL_IMX6UL_A7MPCORE_ADDR);
>
>     sbd = SYS_BUS_DEVICE(&s->a7mpcore);
>     d = DEVICE(&s->cpu);
>
>     sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(d, ARM_CPU_IRQ));
>     sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(d, ARM_CPU_FIQ));
>     sysbus_connect_irq(sbd, 2, qdev_get_gpio_in(d, ARM_CPU_VIRQ));
>     sysbus_connect_irq(sbd, 3, qdev_get_gpio_in(d, ARM_CPU_VFIQ));
>
>
> The FSL_IMX6UL_A7MPCORE_ADDR is defined in fsl-imx6ul.h as part of enum 
> FslIMX6ULMemoryMap:
>
> FSL_IMX6UL_A7MPCORE_ADDR        = 0x00A00000,
>
> This memory region is the same as the address where a data_abort
> occurs in get_cpu_rev.

Yes, but the s->a7mpcore object's MemoryRegion doesn't have anything
at its address 0. This is an object of TYPE_A15MPCORE_PRIV, and
in its source in hw/cpu/15mpcore.c the comment says what it provides:

    /* Memory map (addresses are offsets from PERIPHBASE):
     *  0x0000-0x0fff -- reserved
     *  0x1000-0x1fff -- GIC Distributor
     *  0x2000-0x3fff -- GIC CPU interface
     *  0x4000-0x4fff -- GIC virtual interface control for this CPU
     *  0x5000-0x51ff -- GIC virtual interface control for CPU 0
     *  0x5200-0x53ff -- GIC virtual interface control for CPU 1
     *  0x5400-0x55ff -- GIC virtual interface control for CPU 2
     *  0x5600-0x57ff -- GIC virtual interface control for CPU 3
     *  0x6000-0x7fff -- GIC virtual CPU interface
     */

Note in particular that offsets 0x0000-0x0fff are reserved :
there is nothing there.

A15 and A7 are the same in this regard -- the A7 CPU TRM does
not describe any device at offset 0 from PERIPHBASE.

So the question remains: what does the guest code want to see here?
To answer the question you need to look at the imx6UL SoC's
reference manual to see if it documents anything there. If
it does, then we know what we need to emulate in QEMU. If it
does not, then this is a bug in u-boot that should probably
be fixed there.

thanks
-- PMM