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RE: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memor
From: |
Jamin Lin |
Subject: |
RE: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus |
Date: |
Fri, 26 Jul 2024 06:00:57 +0000 |
Hi Cedric,
> Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register
> memory region of I2C bus
>
> On 7/18/24 11:44, Jamin Lin wrote:
> > Hi Cedric,
> >
> >> Subject: Re: [PATCH v1 04/15] hw/i2c/aspeed: support discontinuous
> >> register memory region of I2C bus
> >>
> >> On 7/18/24 08:49, Jamin Lin wrote:
> >>> It only support continuous register memory region for all I2C bus.
> >>> However, the register address of all I2c bus are discontinuous for
> >>> AST2700.
> >>>
> >>> Ex: the register address of I2C bus for ast2700 as following.
> >>> 0x100 - 0x17F: Device 0
> >>> 0x200 - 0x27F: Device 1
> >>> 0x300 - 0x37F: Device 2
> >>> 0x400 - 0x47F: Device 3
> >>> 0x500 - 0x57F: Device 4
> >>> 0x600 - 0x67F: Device 5
> >>> 0x700 - 0x77F: Device 6
> >>> 0x800 - 0x87F: Device 7
> >>> 0x900 - 0x97F: Device 8
> >>> 0xA00 - 0xA7F: Device 9
> >>> 0xB00 - 0xB7F: Device 10
> >>> 0xC00 - 0xC7F: Device 11
> >>> 0xD00 - 0xD7F: Device 12
> >>> 0xE00 - 0xE7F: Device 13
> >>> 0xF00 – 0xF7F: Device 14
> >>> 0x1000 – 0x107F: Device 15
> >>>
> >>> Introduce a new class attribute to make user set each I2C bus gap size.
> >>> Update formula to create all I2C bus register memory regions.
> >>
> >> I don't think this is necessary to model. Could we simply increase
> >> tge register MMIO size for the AST2700 bus model and rely on the
> >> memops to catch invalid register offsets ?
> >>
> > Thanks for your review and suggestion.
> >
> > Sorry, I am not very clearly understand your comments.
> > Could you please describe it more detail?
> > Thanks-Jamin
>
> I don't think you need to introduce a gap size class attribute.
>
> Setting :
>
> aic->reg_size = 0x100; /* size + gap */
>
> in aspeed_2700_i2c_class_init() should be enough.
>
Sorry reply you late.
The address space of I2C bus and pool buffer are as following
0x100 - 0x17F: device1_reg 0x1a0 - 0x1bf: device1_buf
0x200 - 0x27F: device2_reg 0x2a0 - 0x2bf:device2_buf
0x300 - 0x37F: device3_reg 0x3a0 -0x3bf: device3_buf
I tried to set the aic->reg_size 0x100 and aic->pool_size 0x100.
And the memory regions of I2c bus became as following.
0x100-0x1ff aspeed.i2c.bus.0 0x1a0-0x29f aspeed.i2c.bus.0.pool
0x200-0x2ff aspeed.i2c.bus.1 0x2a0-0x39f aspeed.i2c.bus.1.pool
0x300-0x3ff aspeed.i2c.bus.2 0x3a0-0x49f aspeed.i2c.bus.2.pool
0000000014c0f000-0000000014c10fff (prio 0, i/o): aspeed.i2c
0000000014c0f100-0000000014c0f1ff (prio 0, i/o): aspeed.i2c.bus.0
0000000014c0f1a0-0000000014c0f29f (prio 0, i/o): aspeed.i2c.bus.0.pool
0000000014c0f200-0000000014c0f2ff (prio 0, i/o): aspeed.i2c.bus.1
0000000014c0f2a0-0000000014c0f39f (prio 0, i/o): aspeed.i2c.bus.1.pool
0000000014c0f300-0000000014c0f3ff (prio 0, i/o): aspeed.i2c.bus.2
0000000014c0f3a0-0000000014c0f49f (prio 0, i/o): aspeed.i2c.bus.2.pool
The memory region of aspeed.i2c.bus.0 (0x100-0x1ff) occupied
aspeed.i2c.bus.0.pool address space(0x1a0-0x1bf).
And the memory region of aspeed.i2c.bus.0.pool (0x1a0-0x29f) occupied
aspeed.i2c.bus.1 address space(0x200-0x27F)
That was why I created reg_gap_size and pool_gap_size to fix this issue.
Do you have any suggestion?
Thanks-Jamin
> Thanks,
>
> C.
>
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- [PATCH v1 03/15] hw/i2c/aspeed: support to set the different memory size, (continued)
[PATCH v1 04/15] hw/i2c/aspeed: support discontinuous register memory region of I2C bus, Jamin Lin, 2024/07/18
[PATCH v1 05/15] hw/i2c/aspeed: rename the I2C class pool attribute to share_pool, Jamin Lin, 2024/07/18
[PATCH v1 06/15] hw/i2c/aspeed: introduce a new bus pool buffer attribute in AspeedI2Cbus, Jamin Lin, 2024/07/18
[PATCH v1 08/15] hw/i2c/aspeed: introduce a new dma_dram_offset attribute in AspeedI2Cbus, Jamin Lin, 2024/07/18
[PATCH v1 07/15] hw/i2c/aspeed: support discontinuous poll buffer memory region of I2C bus, Jamin Lin, 2024/07/18
[PATCH v1 09/15] hw/i2c/aspeed: Add AST2700 support, Jamin Lin, 2024/07/18