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Re: [PATCH v3] hw/gpio/aspeed: Add reg_table_size to AspeedGPIOClass


From: Zheyu Ma
Subject: Re: [PATCH v3] hw/gpio/aspeed: Add reg_table_size to AspeedGPIOClass
Date: Thu, 20 Jun 2024 16:03:27 +0200



On Thu, Jun 20, 2024 at 2:35 PM Cédric Le Goater <clg@kaod.org> wrote:

>> @@ -75,6 +75,7 @@ struct AspeedGPIOClass {
>>       uint32_t nr_gpio_pins;
>>       uint32_t nr_gpio_sets;
>>       const AspeedGPIOReg *reg_table;
>> +    uint32_t reg_table_size;
>>   };
>
> - "reg_table_size" is a number of registers, using s/size/count/ might
>    be clearer.
> - No point in specifying 32-bit, "unsigned" is sufficient.
>
> (Cédric, if you agree, you might update your tree).
>
> Unrelated to this patch but figured out while reviewing, in
> aspeed_gpio_read/write 'idx' is
> - pointlessly assigned to -1
> - of type 'uint64_t', also pointless, 'unsigned' is clearer.

Zheyu, could you please send a v4 ? Thanks,
 
Sure. I've sent it.

Zheyu 

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