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[PATCH v3 37/45] Add mailbox tests tags. Part 1
From: |
Sergey Kambalin |
Subject: |
[PATCH v3 37/45] Add mailbox tests tags. Part 1 |
Date: |
Sun, 3 Dec 2023 18:26:11 -0600 |
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com>
---
tests/qtest/bcm2838-mailbox.h | 195 +++++++++++++++++++++++++++++++++-
1 file changed, 190 insertions(+), 5 deletions(-)
diff --git a/tests/qtest/bcm2838-mailbox.h b/tests/qtest/bcm2838-mailbox.h
index 8acc4bd2ff..04472fe23d 100644
--- a/tests/qtest/bcm2838-mailbox.h
+++ b/tests/qtest/bcm2838-mailbox.h
@@ -147,13 +147,21 @@
/* Used to test stubs that don't perform actual work */
#define DUMMY_VALUE 0x12345678
-REG32(MBOX_WRITE_REG, 0)
+REG32(MBOX_WRITE_REG, 0)
FIELD(MBOX_WRITE_REG, CHANNEL, 0, 4)
-FIELD(MBOX_WRITE_REG, DATA, 4, 28)
+FIELD(MBOX_WRITE_REG, DATA, 4, 28)
-REG32(MBOX_SIZE_STAT, 0)
-FIELD(MBOX_WRITE_REG, SIZE, 0, 30)
-FIELD(MBOX_WRITE_REG, SUCCESS, 30, 1)
+REG32(MBOX_SIZE_STAT, 0)
+FIELD(MBOX_SIZE_STAT, SIZE, 0, 30)
+FIELD(MBOX_SIZE_STAT, SUCCESS, 30, 1)
+
+REG32(SET_DEVICE_POWER_STATE_CMD, 0)
+FIELD(SET_DEVICE_POWER_STATE_CMD, EN, 0, 1)
+FIELD(SET_DEVICE_POWER_STATE_CMD, WAIT, 1, 1)
+
+REG32(GET_CLOCK_STATE_CMD, 0)
+FIELD(GET_CLOCK_STATE_CMD, EN, 0, 1)
+FIELD(GET_CLOCK_STATE_CMD, NPRES, 1, 1)
typedef struct {
uint32_t size;
@@ -176,6 +184,183 @@ typedef struct {
\
}; \
} TypeName
+DECLARE_TAG_TYPE(TAG_GET_FIRMWARE_REVISION_t,
+ struct {},
+ struct {
+ uint32_t revision;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_FIRMWARE_VARIANT_t,
+ struct {},
+ struct {
+ uint32_t variant;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_BOARD_REVISION_t,
+ struct {},
+ struct {
+ uint32_t revision;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_ARM_MEMORY_t,
+ struct {},
+ struct {
+ uint32_t base;
+ uint32_t size;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_VC_MEMORY_t,
+ struct {},
+ struct {
+ uint32_t base;
+ uint32_t size;
+ });
+
+DECLARE_TAG_TYPE(TAG_SET_DEVICE_POWER_STATE_t,
+ struct {
+ uint32_t device_id;
+ uint32_t cmd;
+ },
+ struct {
+ uint32_t device_id;
+ uint32_t cmd;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_CLOCK_STATE_t,
+ struct {
+ uint32_t clock_id;
+ },
+ struct {
+ uint32_t clock_id;
+ uint32_t cmd;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_CLOCK_RATE_t,
+ struct {
+ uint32_t clock_id;
+ },
+ struct {
+ uint32_t clock_id;
+ uint32_t rate;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_MAX_CLOCK_RATE_t,
+ struct {
+ uint32_t clock_id;
+ },
+ struct {
+ uint32_t clock_id;
+ uint32_t rate;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_MIN_CLOCK_RATE_t,
+ struct {
+ uint32_t clock_id;
+ },
+ struct {
+ uint32_t clock_id;
+ uint32_t rate;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_CLOCKS_t,
+ struct {},
+ struct {
+ uint32_t root_clock;
+ uint32_t arm_clock;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_TEMPERATURE_t,
+ struct {
+ uint32_t temperature_id;
+ },
+ struct {
+ uint32_t temperature_id;
+ uint32_t temperature;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_MAX_TEMPERATURE_t,
+ struct {
+ uint32_t temperature_id;
+ },
+ struct {
+ uint32_t temperature_id;
+ uint32_t temperature;
+ });
+
+DECLARE_TAG_TYPE(TAG_ALLOCATE_BUFFER_t,
+ struct {
+ uint32_t alignment;
+ },
+ struct {
+ uint32_t base;
+ uint32_t size;
+ });
+
+DECLARE_TAG_TYPE(TAG_RELEASE_FRAMEBUFFER_t,
+ struct {},
+ struct {});
+
+DECLARE_TAG_TYPE(TAG_BLANK_FRAMEBUFFER_t,
+ struct {
+ uint32_t on;
+ },
+ struct {
+ uint32_t on;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_FB_PHYS_WIDTH_t,
+ struct {},
+ struct {
+ uint32_t width;
+ uint32_t height;
+ });
+
+DECLARE_TAG_TYPE(TAG_TEST_FB_PHYS_WIDTH_t,
+ struct {
+ uint32_t width;
+ uint32_t height;
+ },
+ struct {
+ uint32_t width;
+ uint32_t height;
+ });
+
+DECLARE_TAG_TYPE(TAG_SET_FB_PHYS_WIDTH_t,
+ struct {
+ uint32_t width;
+ uint32_t height;
+ },
+ struct {
+ uint32_t width;
+ uint32_t height;
+ });
+
+DECLARE_TAG_TYPE(TAG_GET_FB_VIRT_WIDTH_t,
+ struct {},
+ struct {
+ uint32_t width;
+ uint32_t height;
+ });
+
+DECLARE_TAG_TYPE(TAG_TEST_FB_VIRT_WIDTH_t,
+ struct {
+ uint32_t width;
+ uint32_t height;
+ },
+ struct {
+ uint32_t width;
+ uint32_t height;
+ });
+
+DECLARE_TAG_TYPE(TAG_SET_FB_VIRT_WIDTH_t,
+ struct {
+ uint32_t width;
+ uint32_t height;
+ },
+ struct {
+ uint32_t width;
+ uint32_t height;
+ });
int mbox0_has_data(void);
void mbox0_read_message(uint8_t channel, void *msgbuf, size_t msgbuf_size);
--
2.34.1
- [PATCH v3 30/45] Implement GENET TX path, (continued)
- [PATCH v3 30/45] Implement GENET TX path, Sergey Kambalin, 2023/12/03
- [PATCH v3 31/45] Implement GENET RX path, Sergey Kambalin, 2023/12/03
- [PATCH v3 24/45] Add GENET register structs. Part 2, Sergey Kambalin, 2023/12/03
- [PATCH v3 36/45] Add mailbox test constants, Sergey Kambalin, 2023/12/03
- [PATCH v3 28/45] Implement GENET register ops, Sergey Kambalin, 2023/12/03
- [PATCH v3 42/45] Add mailbox property tests. Part 3, Sergey Kambalin, 2023/12/03
- [PATCH v3 32/45] Enable BCM2838 GENET controller, Sergey Kambalin, 2023/12/03
- [PATCH v3 33/45] Connect RNG200, PCIE and GENET to GIC, Sergey Kambalin, 2023/12/03
- [PATCH v3 35/45] Add mailbox test stub, Sergey Kambalin, 2023/12/03
- [PATCH v3 34/45] Add Rpi4b boot tests, Sergey Kambalin, 2023/12/03
- [PATCH v3 37/45] Add mailbox tests tags. Part 1,
Sergey Kambalin <=
- [PATCH v3 41/45] Add mailbox property tests. Part 2, Sergey Kambalin, 2023/12/03
- [PATCH v3 38/45] Add mailbox tests tags. Part 2, Sergey Kambalin, 2023/12/03
- [PATCH v3 39/45] Add mailbox tests tags. Part 3, Sergey Kambalin, 2023/12/03
- [PATCH v3 40/45] Add mailbox property tests. Part 1, Sergey Kambalin, 2023/12/03
- [PATCH v3 43/45] Add missed BCM2835 properties, Sergey Kambalin, 2023/12/03
- [PATCH v3 44/45] Append added properties to mailbox test, Sergey Kambalin, 2023/12/03
- [PATCH v3 45/45] Add RPi4B to paspi4.rst, Sergey Kambalin, 2023/12/03