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[PATCH 19/45] Get rid of RNG200 timer
From: |
Sergey Kambalin |
Subject: |
[PATCH 19/45] Get rid of RNG200 timer |
Date: |
Sun, 3 Dec 2023 15:28:39 -0600 |
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com>
---
hw/arm/bcm2838_peripherals.c | 14 +++++
hw/arm/raspi4b.c | 1 -
hw/misc/bcm2838_rng200.c | 78 ++++++++++++++++------------
include/hw/arm/bcm2838_peripherals.h | 2 +
include/hw/misc/bcm2838_rng200.h | 4 +-
5 files changed, 63 insertions(+), 36 deletions(-)
diff --git a/hw/arm/bcm2838_peripherals.c b/hw/arm/bcm2838_peripherals.c
index ee06214715..7c489c8e8a 100644
--- a/hw/arm/bcm2838_peripherals.c
+++ b/hw/arm/bcm2838_peripherals.c
@@ -34,6 +34,9 @@ static void bcm2838_peripherals_init(Object *obj)
bc->peri_low_size);
sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_low_mr);
+ /* Random Number Generator */
+ object_initialize_child(obj, "rng200", &s->rng200, TYPE_BCM2838_RNG200);
+
/* PCIe Host Bridge */
object_initialize_child(obj, "pcie-host", &s->pcie_host,
TYPE_BCM2838_PCIE_HOST);
@@ -85,6 +88,17 @@ static void bcm2838_peripherals_realize(DeviceState *dev,
Error **errp)
BCM2838_VC_PERI_LOW_BASE,
&s->peri_low_mr_alias, 1);
+ /* Random Number Generator */
+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng200), errp)) {
+ return;
+ }
+ memory_region_add_subregion(
+ &s_base->peri_mr, RNG_OFFSET,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng200), 0));
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->rng200), 0,
+ qdev_get_gpio_in_named(DEVICE(&s_base->ic), BCM2835_IC_GPU_IRQ,
+ INTERRUPT_RNG));
+
/* Extended Mass Media Controller 2 */
object_property_set_uint(OBJECT(&s->emmc2), "sd-spec-version", 3,
&error_abort);
diff --git a/hw/arm/raspi4b.c b/hw/arm/raspi4b.c
index 2e8474e1c5..7b5385b8dd 100644
--- a/hw/arm/raspi4b.c
+++ b/hw/arm/raspi4b.c
@@ -67,7 +67,6 @@ static void raspi4_modify_dtb(const struct arm_boot_info
*info, void *fdt)
/* Temporarily disable following devices until they are implemented*/
const char *to_be_removed_from_dt_as_wa[] = {
- "brcm,bcm2711-rng200",
"brcm,bcm2711-thermal",
"brcm,bcm2711-genet-v5",
};
diff --git a/hw/misc/bcm2838_rng200.c b/hw/misc/bcm2838_rng200.c
index f91ea0754c..1b334b94d5 100644
--- a/hw/misc/bcm2838_rng200.c
+++ b/hw/misc/bcm2838_rng200.c
@@ -9,6 +9,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
+#include "qom/object_interfaces.h"
#include "qapi/error.h"
#include "hw/qdev-properties.h"
#include "hw/misc/bcm2838_rng200.h"
@@ -64,10 +65,7 @@ static const VMStateDescription vmstate_bcm2838_rng200 = {
.version_id = 1,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
- VMSTATE_UINT32(rbg_period, BCM2838Rng200State),
VMSTATE_UINT32(rng_fifo_cap, BCM2838Rng200State),
- VMSTATE_BOOL(use_timer, BCM2838Rng200State),
-
VMSTATE_ARRAY(regs, BCM2838Rng200State, N_BCM2838_RNG200_REGS, 0,
vmstate_info_uint32, uint32_t),
@@ -90,6 +88,15 @@ static void bcm2838_rng200_update_irq(BCM2838Rng200State *s)
!!(s->regs[R_RNG_INT_ENABLE] & s->regs[R_RNG_INT_STATUS]));
}
+static void bcm2838_rng200_update_rbg_period(void *opaque, ClockEvent event)
+{
+ BCM2838Rng200State *s = (BCM2838Rng200State *)opaque;
+
+ ptimer_transaction_begin(s->ptimer);
+ ptimer_set_period_from_clock(s->ptimer, s->clock, s->rng_fifo_cap * 8);
+ ptimer_transaction_commit(s->ptimer);
+}
+
static void bcm2838_rng200_update_fifo(void *opaque, const void *buf,
size_t size)
{
@@ -121,18 +128,17 @@ static void bcm2838_rng200_update_fifo(void *opaque,
const void *buf,
if ((num == 0) && (num_bits > 0)) {
num = 1;
}
- if (num > 0) {
- fifo8_push_all(fifo, buf, num);
+ fifo8_push_all(fifo, buf, num);
- fifo_thld = FIELD_EX32(s->regs[R_RNG_FIFO_COUNT],
- RNG_FIFO_COUNT, THRESHOLD);
- if (fifo8_num_used(fifo) > fifo_thld) {
- s->regs[R_RNG_INT_STATUS] = FIELD_DP32(s->regs[R_RNG_INT_STATUS],
- RNG_INT_STATUS,
- TOTAL_BITS_COUNT_IRQ, 1);
- }
+ fifo_thld = FIELD_EX32(s->regs[R_RNG_FIFO_COUNT],
+ RNG_FIFO_COUNT, THRESHOLD);
+
+ if (fifo8_num_used(fifo) > fifo_thld) {
+ s->regs[R_RNG_INT_STATUS] = FIELD_DP32(s->regs[R_RNG_INT_STATUS],
+ RNG_INT_STATUS,
+ TOTAL_BITS_COUNT_IRQ, 1);
}
s->regs[R_RNG_FIFO_COUNT] = FIELD_DP32(s->regs[R_RNG_FIFO_COUNT],
@@ -149,9 +155,7 @@ static void bcm2838_rng200_fill_fifo(BCM2838Rng200State *s)
bcm2838_rng200_update_fifo, s);
}
-/* This function will be implemnented in upcoming commits */
-static void bcm2838_rng200_disable_rbg(BCM2838Rng200State *s
- __attribute__((unused)))
+static void bcm2838_rng200_disable_rbg(void)
{
trace_bcm2838_rng200_disable_rbg();
}
@@ -184,23 +188,21 @@ static void bcm2838_rng200_rbg_reset(BCM2838Rng200State
*s)
static uint32_t bcm2838_rng200_read_fifo_data(BCM2838Rng200State *s)
{
- Fifo8 *fifo = &s->fifo;
const uint8_t *buf;
+ Fifo8 *fifo = &s->fifo;
+ uint32_t to_read = MIN(fifo8_num_used(fifo), 4);
+ uint8_t byte_buf[4] = {};
+ uint8_t *p = byte_buf;
uint32_t ret = 0;
uint32_t num = 0;
- uint32_t max = MIN(fifo8_num_used(fifo), sizeof(ret));
- if (max > 0) {
- buf = fifo8_pop_buf(fifo, max, &num);
- if ((buf != NULL) && (num > 0)) {
- memcpy(&ret, buf, num);
- }
- } else {
- qemu_log_mask(
- LOG_GUEST_ERROR,
- "bcm2838_rng200_read_fifo_data: FIFO is empty\n"
- );
+ while (to_read) {
+ buf = fifo8_pop_buf(fifo, to_read, &num);
+ memcpy(p, buf, num);
+ p += num;
+ to_read -= num;
}
+ ret = ldl_le_p(byte_buf);
s->regs[R_RNG_FIFO_COUNT] = FIELD_DP32(s->regs[R_RNG_FIFO_COUNT],
RNG_FIFO_COUNT,
@@ -222,7 +224,7 @@ static void bcm2838_rng200_ctrl_write(BCM2838Rng200State
*s, uint32_t value)
if (!currently_enabled && enable_requested) {
bcm2838_rng200_enable_rbg(s);
} else if (currently_enabled && !enable_requested) {
- bcm2838_rng200_disable_rbg(s);
+ bcm2838_rng200_disable_rbg();
}
}
@@ -321,6 +323,14 @@ static const MemoryRegionOps bcm2838_rng200_ops = {
.read = bcm2838_rng200_read,
.write = bcm2838_rng200_write,
.endianness = DEVICE_NATIVE_ENDIAN,
+ .impl = {
+ .max_access_size = 4,
+ .min_access_size = 4,
+ },
+ .valid = {
+ .max_access_size = 4,
+ .min_access_size = 4
+ },
};
static void bcm2838_rng200_realize(DeviceState *dev, Error **errp)
@@ -330,6 +340,13 @@ static void bcm2838_rng200_realize(DeviceState *dev, Error
**errp)
if (s->rng == NULL) {
Object *default_backend = object_new(TYPE_RNG_BUILTIN);
+ if (!user_creatable_complete(USER_CREATABLE(default_backend),
+ errp)) {
+ object_unref(default_backend);
+ error_setg(errp, "Failed to create user creatable RNG backend");
+ return;
+ }
+
object_property_add_child(OBJECT(dev), "default-backend",
default_backend);
object_unref(default_backend);
@@ -347,13 +364,10 @@ static void bcm2838_rng200_init(Object *obj)
BCM2838Rng200State *s = BCM2838_RNG200(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
- s->rbg_period = 250;
- s->use_timer = true;
-
s->rng_fifo_cap = 128;
s->clock = qdev_init_clock_in(DEVICE(s), "rbg-clock",
- NULL, s,
+ bcm2838_rng200_update_rbg_period, s,
ClockPreUpdate);
if (s->clock == NULL) {
error_setg(&error_fatal, "Failed to init RBG clock");
diff --git a/include/hw/arm/bcm2838_peripherals.h
b/include/hw/arm/bcm2838_peripherals.h
index 2af96df1c6..317df005bf 100644
--- a/include/hw/arm/bcm2838_peripherals.h
+++ b/include/hw/arm/bcm2838_peripherals.h
@@ -10,6 +10,7 @@
#define BCM2838_PERIPHERALS_H
#include "hw/arm/bcm2835_peripherals.h"
+#include "hw/misc/bcm2838_rng200.h"
#include "hw/arm/bcm2838_pcie.h"
#include "hw/sd/sdhci.h"
#include "hw/gpio/bcm2838_gpio.h"
@@ -65,6 +66,7 @@ struct BCM2838PeripheralState {
MemoryRegion mphi_mr_alias;
MemoryRegion pcie_mmio_alias;
+ BCM2838Rng200State rng200;
SDHCIState emmc2;
BCM2838PcieHostState pcie_host;
BCM2838GpioState gpio;
diff --git a/include/hw/misc/bcm2838_rng200.h b/include/hw/misc/bcm2838_rng200.h
index 46fdba48da..8e084b7254 100644
--- a/include/hw/misc/bcm2838_rng200.h
+++ b/include/hw/misc/bcm2838_rng200.h
@@ -32,11 +32,9 @@ struct BCM2838Rng200State {
RngBackend *rng;
Clock *clock;
- uint32_t rbg_period;
uint32_t rng_fifo_cap;
- bool use_timer;
-
Fifo8 fifo;
+
qemu_irq irq;
uint32_t regs[N_BCM2838_RNG200_REGS];
--
2.34.1
- [PATCH 09/45] Add GPIO and SD to BCM2838 periph, (continued)
- [PATCH 09/45] Add GPIO and SD to BCM2838 periph, Sergey Kambalin, 2023/12/03
- [PATCH 10/45] Add BCM2838 checkpoint support, Sergey Kambalin, 2023/12/03
- [PATCH 11/45] Introduce Raspberry PI 4 machine, Sergey Kambalin, 2023/12/03
- [PATCH 12/45] Temporarily disable unimplemented rpi4b devices, Sergey Kambalin, 2023/12/03
- [PATCH 13/45] Add memory region for BCM2837 RPiVid ASB, Sergey Kambalin, 2023/12/03
- [PATCH 14/45] Add BCM2838 PCIE Root Complex, Sergey Kambalin, 2023/12/03
- [PATCH 15/45] Add BCM2838 PCIE host, Sergey Kambalin, 2023/12/03
- [PATCH 16/45] Enable BCM2838 PCIE, Sergey Kambalin, 2023/12/03
- [PATCH 17/45] Add RNG200 skeleton, Sergey Kambalin, 2023/12/03
- [PATCH 18/45] Add RNG200 RNG and RBG, Sergey Kambalin, 2023/12/03
- [PATCH 19/45] Get rid of RNG200 timer,
Sergey Kambalin <=
- [PATCH 20/45] Implement BCM2838 thermal sensor, Sergey Kambalin, 2023/12/03
- [PATCH 21/45] Add clock_isp stub, Sergey Kambalin, 2023/12/03
- [PATCH 22/45] Add GENET stub, Sergey Kambalin, 2023/12/03
- [PATCH 23/45] Add GENET register structs. Part 1, Sergey Kambalin, 2023/12/03
- [PATCH 24/45] Add GENET register structs. Part 2, Sergey Kambalin, 2023/12/03
- [PATCH 25/45] Add GENET register structs. Part 3, Sergey Kambalin, 2023/12/03
- [PATCH 26/45] Add GENET register structs. Part 4, Sergey Kambalin, 2023/12/03
- [PATCH 27/45] Add GENET register access macros, Sergey Kambalin, 2023/12/03
- [PATCH 28/45] Implement GENET register ops, Sergey Kambalin, 2023/12/03
- [PATCH 29/45] Implement GENET MDIO, Sergey Kambalin, 2023/12/03