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[PULL 02/41] accel/tcg: spelling fixes
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 02/41] accel/tcg: spelling fixes |
Date: |
Thu, 31 Aug 2023 14:56:04 +0200 |
From: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Message-ID: <20230823065335.1919380-18-mjt@tls.msk.ru>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <20230823065335.1919380-19-mjt@tls.msk.ru>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
include/hw/core/tcg-cpu-ops.h | 2 +-
include/tcg/helper-info.h | 2 +-
include/tcg/tcg.h | 4 ++--
include/user/safe-syscall.h | 2 +-
accel/tcg/tb-maint.c | 2 +-
contrib/plugins/cache.c | 2 +-
contrib/plugins/lockstep.c | 2 +-
linux-user/flatload.c | 2 +-
linux-user/syscall.c | 4 ++--
semihosting/config.c | 2 +-
semihosting/syscalls.c | 4 ++--
softmmu/icount.c | 2 +-
softmmu/ioport.c | 2 +-
13 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
index 3e8b1b737a..479713a36e 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -14,7 +14,7 @@
struct TCGCPUOps {
/**
- * @initialize: Initalize TCG state
+ * @initialize: Initialize TCG state
*
* Called when the first CPU is realized.
*/
diff --git a/include/tcg/helper-info.h b/include/tcg/helper-info.h
index 4b6c9b43e8..7c27d6164a 100644
--- a/include/tcg/helper-info.h
+++ b/include/tcg/helper-info.h
@@ -1,5 +1,5 @@
/*
- * TCG Helper Infomation Structure
+ * TCG Helper Information Structure
*
* Copyright (c) 2023 Linaro Ltd
*
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index 61d7c81b44..c9c6d770d0 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -879,7 +879,7 @@ enum {
/* Instruction operands are 64-bits (otherwise 32-bits). */
TCG_OPF_64BIT = 0x10,
/* Instruction is optional and not implemented by the host, or insn
- is generic and should not be implemened by the host. */
+ is generic and should not be implemented by the host. */
TCG_OPF_NOT_PRESENT = 0x20,
/* Instruction operands are vectors. */
TCG_OPF_VECTOR = 0x40,
@@ -1123,7 +1123,7 @@ static inline int tcg_can_emit_vec_op(TCGOpcode o,
TCGType t, unsigned ve)
/* Expand the tuple (opc, type, vece) on the given arguments. */
void tcg_expand_vec_op(TCGOpcode, TCGType, unsigned, TCGArg, ...);
-/* Replicate a constant C accoring to the log2 of the element size. */
+/* Replicate a constant C according to the log2 of the element size. */
uint64_t dup_const(unsigned vece, uint64_t c);
#define dup_const(VECE, C) \
diff --git a/include/user/safe-syscall.h b/include/user/safe-syscall.h
index ddceef12e2..195cedac04 100644
--- a/include/user/safe-syscall.h
+++ b/include/user/safe-syscall.h
@@ -91,7 +91,7 @@
*
* The basic setup is that we make the host syscall via a known
* section of host native assembly. If a signal occurs, our signal
- * handler checks the interrupted host PC against the addresse of that
+ * handler checks the interrupted host PC against the address of that
* known section. If the PC is before or at the address of the syscall
* instruction then we change the PC to point at a "return
* -QEMU_ERESTARTSYS" code path instead, and then exit the signal handler
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index c406b2f7b7..32ae8af61c 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -1,5 +1,5 @@
/*
- * Translation Block Maintaince
+ * Translation Block Maintenance
*
* Copyright (c) 2003 Fabrice Bellard
*
diff --git a/contrib/plugins/cache.c b/contrib/plugins/cache.c
index 5036213f1b..dea4a56c8d 100644
--- a/contrib/plugins/cache.c
+++ b/contrib/plugins/cache.c
@@ -350,7 +350,7 @@ static int in_cache(Cache *cache, uint64_t addr)
* @cache: The cache under simulation
* @addr: The address of the requested memory location
*
- * Returns true if the requsted data is hit in the cache and false when missed.
+ * Returns true if the requested data is hit in the cache and false when
missed.
* The cache is updated on miss for the next access.
*/
static bool access_cache(Cache *cache, uint64_t addr)
diff --git a/contrib/plugins/lockstep.c b/contrib/plugins/lockstep.c
index 3614c3564c..850f7b2941 100644
--- a/contrib/plugins/lockstep.c
+++ b/contrib/plugins/lockstep.c
@@ -108,7 +108,7 @@ static void report_divergance(ExecState *us, ExecState
*them)
/*
* If we have diverged before did we get back on track or are we
- * totally loosing it?
+ * totally losing it?
*/
if (divergence_log) {
DivergeState *last = (DivergeState *) divergence_log->data;
diff --git a/linux-user/flatload.c b/linux-user/flatload.c
index 8f5e9f489b..4331a11bf0 100644
--- a/linux-user/flatload.c
+++ b/linux-user/flatload.c
@@ -780,7 +780,7 @@ int load_flt_binary(struct linux_binprm *bprm, struct
image_info *info)
/* Enforce final stack alignment of 16 bytes. This is sufficient
for all current targets, and excess alignment is harmless. */
stack_len = bprm->envc + bprm->argc + 2;
- stack_len += flat_argvp_envp_on_stack() ? 2 : 0; /* arvg, argp */
+ stack_len += flat_argvp_envp_on_stack() ? 2 : 0; /* argv, argp */
stack_len += 1; /* argc */
stack_len *= sizeof(abi_ulong);
sp -= (sp - stack_len) & 15;
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 9353268cc1..7ccd3affbe 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -1809,7 +1809,7 @@ static inline abi_long target_to_host_cmsg(struct msghdr
*msgh,
uint32_t *dst = (uint32_t *)data;
memcpy(dst, target_data, len);
- /* fix endianess of first 32-bit word */
+ /* fix endianness of first 32-bit word */
if (len >= sizeof(uint32_t)) {
*dst = tswap32(*dst);
}
@@ -2920,7 +2920,7 @@ get_timeout:
unlock_user(results, optval_addr, 0);
return ret;
}
- /* swap host endianess to target endianess. */
+ /* swap host endianness to target endianness. */
for (i = 0; i < (len / sizeof(uint32_t)); i++) {
results[i] = tswap32(results[i]);
}
diff --git a/semihosting/config.c b/semihosting/config.c
index 89a1759687..8ca569735d 100644
--- a/semihosting/config.c
+++ b/semihosting/config.c
@@ -8,7 +8,7 @@
* targets that support it. Architecture specific handling is handled
* in target/HW/HW-semi.c
*
- * Semihosting is sightly strange in that it is also supported by some
+ * Semihosting is slightly strange in that it is also supported by some
* linux-user targets. However in that use case no configuration of
* the outputs and command lines is supported.
*
diff --git a/semihosting/syscalls.c b/semihosting/syscalls.c
index 68899ebb1c..d27574a1e2 100644
--- a/semihosting/syscalls.c
+++ b/semihosting/syscalls.c
@@ -720,7 +720,7 @@ void semihost_sys_read_gf(CPUState *cs,
gdb_syscall_complete_cb complete,
GuestFD *gf, target_ulong buf, target_ulong len)
{
/*
- * Bound length for 64-bit guests on 32-bit hosts, not overlowing ssize_t.
+ * Bound length for 64-bit guests on 32-bit hosts, not overflowing ssize_t.
* Note the Linux kernel does this with MAX_RW_COUNT, so it's not a bad
* idea to do this unconditionally.
*/
@@ -761,7 +761,7 @@ void semihost_sys_write_gf(CPUState *cs,
gdb_syscall_complete_cb complete,
GuestFD *gf, target_ulong buf, target_ulong len)
{
/*
- * Bound length for 64-bit guests on 32-bit hosts, not overlowing ssize_t.
+ * Bound length for 64-bit guests on 32-bit hosts, not overflowing ssize_t.
* Note the Linux kernel does this with MAX_RW_COUNT, so it's not a bad
* idea to do this unconditionally.
*/
diff --git a/softmmu/icount.c b/softmmu/icount.c
index a5cef9c60a..144e24829c 100644
--- a/softmmu/icount.c
+++ b/softmmu/icount.c
@@ -325,7 +325,7 @@ void icount_start_warp_timer(void)
* vCPU is sleeping and warp can't be started.
* It is probably a race condition: notification sent
* to vCPU was processed in advance and vCPU went to sleep.
- * Therefore we have to wake it up for doing someting.
+ * Therefore we have to wake it up for doing something.
*/
if (replay_has_event()) {
qemu_clock_notify(QEMU_CLOCK_VIRTUAL);
diff --git a/softmmu/ioport.c b/softmmu/ioport.c
index b66e0a5a8e..1824aa808c 100644
--- a/softmmu/ioport.c
+++ b/softmmu/ioport.c
@@ -22,7 +22,7 @@
* THE SOFTWARE.
*/
/*
- * splitted out ioport related stuffs from vl.c.
+ * split out ioport related stuffs from vl.c.
*/
#include "qemu/osdep.h"
--
2.41.0
- [PULL 00/41] Misc patches for 2023-08-31, Philippe Mathieu-Daudé, 2023/08/31
- [PULL 01/41] accel: Remove HAX accelerator, Philippe Mathieu-Daudé, 2023/08/31
- [PULL 02/41] accel/tcg: spelling fixes,
Philippe Mathieu-Daudé <=
- [PULL 04/41] bulk: Do not declare function prototypes using 'extern' keyword, Philippe Mathieu-Daudé, 2023/08/31
- [PULL 03/41] qemu/uri: Use QueryParams type definition, Philippe Mathieu-Daudé, 2023/08/31
- [PULL 05/41] hw/net/i82596: Include missing 'exec/address-spaces.h' header, Philippe Mathieu-Daudé, 2023/08/31
- [PULL 06/41] hw/dma/etraxfs: Include missing 'exec/memory.h' header, Philippe Mathieu-Daudé, 2023/08/31
- [PULL 07/41] exec/address-spaces.h: Remove unuseful 'exec/memory.h' include, Philippe Mathieu-Daudé, 2023/08/31
- [PULL 08/41] target/ppc/pmu: Include missing 'qemu/timer.h' header, Philippe Mathieu-Daudé, 2023/08/31
- [PULL 09/41] target/riscv/pmu: Restrict 'qemu/log.h' include to source, Philippe Mathieu-Daudé, 2023/08/31
- [PULL 10/41] target/translate: Include missing 'exec/cpu_ldst.h' header, Philippe Mathieu-Daudé, 2023/08/31
- [PULL 12/41] target/translate: Restrict 'exec/cpu_ldst.h' to user emulation, Philippe Mathieu-Daudé, 2023/08/31
- [PULL 11/41] target/translate: Remove unnecessary 'exec/cpu_ldst.h' header, Philippe Mathieu-Daudé, 2023/08/31