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[PATCH v4 5/6] Add i.MX7 missing TZ devices and memory regions
From: |
Jean-Christophe Dubois |
Subject: |
[PATCH v4 5/6] Add i.MX7 missing TZ devices and memory regions |
Date: |
Fri, 25 Aug 2023 14:20:55 +0200 |
* Add TZASC as unimplemented device.
- Allow bare metal application to access this (unimplemented) device
* Add CSU as unimplemented device.
- Allow bare metal application to access this (unimplemented) device
* Add various memory segments
- OCRAM
- OCRAM EPDC
- OCRAM PXP
- OCRAM S
- ROM
- CAAM
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/arm/fsl-imx7.c | 63 +++++++++++++++++++++++++++++++++++++++
include/hw/arm/fsl-imx7.h | 7 +++++
2 files changed, 70 insertions(+)
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index e976053539..97e982bf06 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -664,6 +664,69 @@ static void fsl_imx7_realize(DeviceState *dev, Error
**errp)
create_unimplemented_device("pcie-phy", FSL_IMX7_PCIE_PHY_ADDR,
FSL_IMX7_PCIE_PHY_SIZE);
+ /*
+ * CSU
+ */
+ create_unimplemented_device("csu", FSL_IMX7_CSU_ADDR,
+ FSL_IMX7_CSU_SIZE);
+
+ /*
+ * TZASC
+ */
+ create_unimplemented_device("tzasc", FSL_IMX7_TZASC_ADDR,
+ FSL_IMX7_TZASC_SIZE);
+
+ /*
+ * OCRAM memory
+ */
+ memory_region_init_ram(&s->ocram, NULL, "imx7.ocram",
+ FSL_IMX7_OCRAM_MEM_SIZE,
+ &error_abort);
+ memory_region_add_subregion(get_system_memory(), FSL_IMX7_OCRAM_MEM_ADDR,
+ &s->ocram);
+
+ /*
+ * OCRAM EPDC memory
+ */
+ memory_region_init_ram(&s->ocram_epdc, NULL, "imx7.ocram_epdc",
+ FSL_IMX7_OCRAM_EPDC_SIZE,
+ &error_abort);
+ memory_region_add_subregion(get_system_memory(), FSL_IMX7_OCRAM_EPDC_ADDR,
+ &s->ocram_epdc);
+
+ /*
+ * OCRAM PXP memory
+ */
+ memory_region_init_ram(&s->ocram_pxp, NULL, "imx7.ocram_pxp",
+ FSL_IMX7_OCRAM_PXP_SIZE,
+ &error_abort);
+ memory_region_add_subregion(get_system_memory(), FSL_IMX7_OCRAM_PXP_ADDR,
+ &s->ocram_pxp);
+
+ /*
+ * OCRAM_S memory
+ */
+ memory_region_init_ram(&s->ocram_s, NULL, "imx7.ocram_s",
+ FSL_IMX7_OCRAM_S_SIZE,
+ &error_abort);
+ memory_region_add_subregion(get_system_memory(), FSL_IMX7_OCRAM_S_ADDR,
+ &s->ocram_s);
+
+ /*
+ * ROM memory
+ */
+ memory_region_init_rom(&s->rom, OBJECT(dev), "imx7.rom",
+ FSL_IMX7_ROM_SIZE, &error_abort);
+ memory_region_add_subregion(get_system_memory(), FSL_IMX7_ROM_ADDR,
+ &s->rom);
+
+ /*
+ * CAAM memory
+ */
+ memory_region_init_rom(&s->caam, OBJECT(dev), "imx7.caam",
+ FSL_IMX7_CAAM_MEM_SIZE, &error_abort);
+ memory_region_add_subregion(get_system_memory(), FSL_IMX7_CAAM_MEM_ADDR,
+ &s->caam);
}
static Property fsl_imx7_properties[] = {
diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
index 06b2c5e4ac..01e15004d7 100644
--- a/include/hw/arm/fsl-imx7.h
+++ b/include/hw/arm/fsl-imx7.h
@@ -84,6 +84,13 @@ struct FslIMX7State {
IMX7GPRState gpr;
ChipideaState usb[FSL_IMX7_NUM_USBS];
DesignwarePCIEHost pcie;
+ MemoryRegion rom;
+ MemoryRegion caam;
+ MemoryRegion ocram;
+ MemoryRegion ocram_epdc;
+ MemoryRegion ocram_pxp;
+ MemoryRegion ocram_s;
+
uint32_t phy_num[FSL_IMX7_NUM_ETHS];
bool phy_connected[FSL_IMX7_NUM_ETHS];
};
--
2.34.1
- [PATCH v4 0/6] Complete i.MX6UL and i.MX7 processor for bare metal application., Jean-Christophe Dubois, 2023/08/25
- [PATCH v4 1/6] Remove i.MX7 IOMUX GPR device from i.MX6UL, Jean-Christophe Dubois, 2023/08/25
- [PATCH v4 2/6] Refactor i.MX6UL processor code, Jean-Christophe Dubois, 2023/08/25
- [PATCH v4 4/6] Refactor i.MX7 processor code, Jean-Christophe Dubois, 2023/08/25
- [PATCH v4 5/6] Add i.MX7 missing TZ devices and memory regions,
Jean-Christophe Dubois <=
- [PATCH v4 3/6] Add i.MX6UL missing devices., Jean-Christophe Dubois, 2023/08/25
- [PATCH v4 6/6] Add i.MX7 SRC device implementation, Jean-Christophe Dubois, 2023/08/25
- Re: [PATCH v4 0/6] Complete i.MX6UL and i.MX7 processor for bare metal application., Peter Maydell, 2023/08/29