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[PATCH 12/12] target/mips: Use generic hrev32_tl() in WSBH opcode
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From: |
Philippe Mathieu-Daudé |
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Subject: |
[PATCH 12/12] target/mips: Use generic hrev32_tl() in WSBH opcode |
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Date: |
Tue, 22 Aug 2023 14:57:52 +0200 |
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/mips/tcg/translate.c | 13 ++-----------
1 file changed, 2 insertions(+), 11 deletions(-)
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 08ee745a6d..822b932262 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -4916,17 +4916,8 @@ static void gen_bshfl(DisasContext *ctx, uint32_t op2,
int rt, int rd)
gen_load_gpr(t0, rt);
switch (op2) {
case OPC_WSBH:
- {
- TCGv t1 = tcg_temp_new();
- TCGv t2 = tcg_constant_tl(0x00FF00FF);
-
- tcg_gen_shri_tl(t1, t0, 8);
- tcg_gen_and_tl(t1, t1, t2);
- tcg_gen_and_tl(t0, t0, t2);
- tcg_gen_shli_tl(t0, t0, 8);
- tcg_gen_or_tl(t0, t0, t1);
- tcg_gen_ext32s_tl(cpu_gpr[rd], t0);
- }
+ tcg_gen_hrev32_tl(t0, t0);
+ tcg_gen_ext32s_tl(cpu_gpr[rd], t0);
break;
case OPC_SEB:
tcg_gen_ext8s_tl(cpu_gpr[rd], t0);
--
2.41.0
- Re: [PATCH 08/12] target/loongarch: Use generic hrev64_i64() in REVB.4H opcode, (continued)
- [PATCH 07/12] target/ppc: Use generic hrev64_i64() in BRH / BSWAP16x8 opcodes, Philippe Mathieu-Daudé, 2023/08/22
- [PATCH 06/12] target/mips: Use generic hrev64_i64() in DSBH opcode, Philippe Mathieu-Daudé, 2023/08/22
- [PATCH 12/12] target/mips: Use generic hrev32_tl() in WSBH opcode,
Philippe Mathieu-Daudé <=
- Re: [PATCH 00/12] tcg: Factor hrev{32,64}_{i32,i64,tl} out, Nicholas Piggin, 2023/08/25