[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v2 01/11] target/arm: Reduce dcz_blocksize to uint8_t
From: |
Richard Henderson |
Subject: |
[PATCH v2 01/11] target/arm: Reduce dcz_blocksize to uint8_t |
Date: |
Fri, 11 Aug 2023 14:40:21 -0700 |
This value is only 4 bits wide.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 88e5accda6..7fedbb34ba 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1074,7 +1074,8 @@ struct ArchCPU {
bool prop_lpa2;
/* DCZ blocksize, in log_2(words), ie low 4 bits of DCZID_EL0 */
- uint32_t dcz_blocksize;
+ uint8_t dcz_blocksize;
+
uint64_t rvbar_prop; /* Property/input signals. */
/* Configurable aspects of GIC cpu interface (which is part of the CPU) */
--
2.34.1
- Re: [PATCH v2 08/11] target/arm: Implement RMR_EL3 for neoverse-v1, (continued)
- [PATCH v2 09/11] target/arm: Suppress FEAT_TRBE (Trace Buffer Extension), Richard Henderson, 2023/08/11
- [PATCH v2 03/11] target/arm: Support more GM blocksizes, Richard Henderson, 2023/08/11
- [PATCH v2 10/11] target/arm: Implement FEAT_HPDS2 as a no-op, Richard Henderson, 2023/08/11
- [PATCH v2 02/11] target/arm: Allow cpu to configure GM blocksize, Richard Henderson, 2023/08/11
- [PATCH v2 07/11] target/arm: Apply access checks to neoverse-v1 special registers, Richard Henderson, 2023/08/11
- [PATCH v2 01/11] target/arm: Reduce dcz_blocksize to uint8_t,
Richard Henderson <=
- [PATCH v2 05/11] target/arm: Introduce make_ccsidr64, Richard Henderson, 2023/08/11
- [PATCH v2 11/11] target/arm: Implement cortex-a710, Richard Henderson, 2023/08/11
- Re: [PATCH v2 00/11] target/arm: Implement cortex-a710, Peter Maydell, 2023/08/29