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[PATCH 1/1] hw/arm/sbsa-ref: add PCIe node into DT
From: |
Marcin Juszkiewicz |
Subject: |
[PATCH 1/1] hw/arm/sbsa-ref: add PCIe node into DT |
Date: |
Mon, 26 Jun 2023 09:51:56 +0200 |
Add PCI Express information into DeviceTree as part of SBSA-REF
versioning.
Trusted Firmware will read it and provide to next firmware level.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
hw/arm/sbsa-ref.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 0639f97dd5..b87d2ee3b2 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -171,6 +171,25 @@ static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState
*sms, int idx)
return arm_cpu_mp_affinity(idx, clustersz);
}
+static void sbsa_fdt_add_pcie_node(SBSAMachineState *sms)
+{
+ char *nodename;
+
+ nodename = g_strdup_printf("/pcie");
+ qemu_fdt_add_subnode(sms->fdt, nodename);
+ qemu_fdt_setprop_sized_cells(sms->fdt, nodename, "reg",
+ 2, sbsa_ref_memmap[SBSA_PCIE_ECAM].base,
+ 2, sbsa_ref_memmap[SBSA_PCIE_ECAM].size,
+ 2, sbsa_ref_memmap[SBSA_PCIE_PIO].base,
+ 2, sbsa_ref_memmap[SBSA_PCIE_PIO].size,
+ 2, sbsa_ref_memmap[SBSA_PCIE_MMIO].base,
+ 2, sbsa_ref_memmap[SBSA_PCIE_MMIO].size,
+ 2, sbsa_ref_memmap[SBSA_PCIE_MMIO_HIGH].base,
+ 2, sbsa_ref_memmap[SBSA_PCIE_MMIO_HIGH].size);
+
+ g_free(nodename);
+}
+
static void sbsa_fdt_add_gic_node(SBSAMachineState *sms)
{
char *nodename;
@@ -286,6 +305,7 @@ static void create_fdt(SBSAMachineState *sms)
}
sbsa_fdt_add_gic_node(sms);
+ sbsa_fdt_add_pcie_node(sms);
}
#define SBSA_FLASH_SECTOR_SIZE (256 * KiB)
--
2.41.0
- [PATCH 1/1] hw/arm/sbsa-ref: add PCIe node into DT,
Marcin Juszkiewicz <=