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[PATCH v3 5/9] hw/core/cpu: Check for USER_ONLY definition instead of SO
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v3 5/9] hw/core/cpu: Check for USER_ONLY definition instead of SOFTMMU one |
Date: |
Tue, 13 Jun 2023 15:33:43 +0200 |
Since we *might* have user emulation with softmmu,
replace the system emulation check by !user emulation one.
Invert the #ifdef'ry in TCGCPUOps structure for clarity.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/core/cpu.h | 4 +-
include/hw/core/tcg-cpu-ops.h | 102 +++++++++++++++++-----------------
2 files changed, 53 insertions(+), 53 deletions(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 383456d1b3..f41b0c56f7 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -1014,7 +1014,7 @@ void page_size_init(void);
#ifdef NEED_CPU_H
-#ifdef CONFIG_SOFTMMU
+#ifndef CONFIG_USER_ONLY
extern const VMStateDescription vmstate_cpu_common;
@@ -1025,7 +1025,7 @@ extern const VMStateDescription vmstate_cpu_common;
.flags = VMS_STRUCT, \
.offset = 0, \
}
-#endif /* CONFIG_SOFTMMU */
+#endif /* !CONFIG_USER_ONLY */
#endif /* NEED_CPU_H */
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
index 0ae08df47e..3e8b1b737a 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -64,7 +64,56 @@ struct TCGCPUOps {
*/
void (*do_interrupt)(CPUState *cpu);
#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */
-#ifdef CONFIG_SOFTMMU
+#ifdef CONFIG_USER_ONLY
+ /**
+ * record_sigsegv:
+ * @cpu: cpu context
+ * @addr: faulting guest address
+ * @access_type: access was read/write/execute
+ * @maperr: true for invalid page, false for permission fault
+ * @ra: host pc for unwinding
+ *
+ * We are about to raise SIGSEGV with si_code set for @maperr,
+ * and si_addr set for @addr. Record anything further needed
+ * for the signal ucontext_t.
+ *
+ * If the emulated kernel does not provide anything to the signal
+ * handler with anything besides the user context registers, and
+ * the siginfo_t, then this hook need do nothing and may be omitted.
+ * Otherwise, record the data and return; the caller will raise
+ * the signal, unwind the cpu state, and return to the main loop.
+ *
+ * If it is simpler to re-use the sysemu tlb_fill code, @ra is provided
+ * so that a "normal" cpu exception can be raised. In this case,
+ * the signal must be raised by the architecture cpu_loop.
+ */
+ void (*record_sigsegv)(CPUState *cpu, vaddr addr,
+ MMUAccessType access_type,
+ bool maperr, uintptr_t ra);
+ /**
+ * record_sigbus:
+ * @cpu: cpu context
+ * @addr: misaligned guest address
+ * @access_type: access was read/write/execute
+ * @ra: host pc for unwinding
+ *
+ * We are about to raise SIGBUS with si_code BUS_ADRALN,
+ * and si_addr set for @addr. Record anything further needed
+ * for the signal ucontext_t.
+ *
+ * If the emulated kernel does not provide the signal handler with
+ * anything besides the user context registers, and the siginfo_t,
+ * then this hook need do nothing and may be omitted.
+ * Otherwise, record the data and return; the caller will raise
+ * the signal, unwind the cpu state, and return to the main loop.
+ *
+ * If it is simpler to re-use the sysemu do_unaligned_access code,
+ * @ra is provided so that a "normal" cpu exception can be raised.
+ * In this case, the signal must be raised by the architecture cpu_loop.
+ */
+ void (*record_sigbus)(CPUState *cpu, vaddr addr,
+ MMUAccessType access_type, uintptr_t ra);
+#else
/** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
/**
@@ -121,56 +170,7 @@ struct TCGCPUOps {
*/
bool (*io_recompile_replay_branch)(CPUState *cpu,
const TranslationBlock *tb);
-#else
- /**
- * record_sigsegv:
- * @cpu: cpu context
- * @addr: faulting guest address
- * @access_type: access was read/write/execute
- * @maperr: true for invalid page, false for permission fault
- * @ra: host pc for unwinding
- *
- * We are about to raise SIGSEGV with si_code set for @maperr,
- * and si_addr set for @addr. Record anything further needed
- * for the signal ucontext_t.
- *
- * If the emulated kernel does not provide anything to the signal
- * handler with anything besides the user context registers, and
- * the siginfo_t, then this hook need do nothing and may be omitted.
- * Otherwise, record the data and return; the caller will raise
- * the signal, unwind the cpu state, and return to the main loop.
- *
- * If it is simpler to re-use the sysemu tlb_fill code, @ra is provided
- * so that a "normal" cpu exception can be raised. In this case,
- * the signal must be raised by the architecture cpu_loop.
- */
- void (*record_sigsegv)(CPUState *cpu, vaddr addr,
- MMUAccessType access_type,
- bool maperr, uintptr_t ra);
- /**
- * record_sigbus:
- * @cpu: cpu context
- * @addr: misaligned guest address
- * @access_type: access was read/write/execute
- * @ra: host pc for unwinding
- *
- * We are about to raise SIGBUS with si_code BUS_ADRALN,
- * and si_addr set for @addr. Record anything further needed
- * for the signal ucontext_t.
- *
- * If the emulated kernel does not provide the signal handler with
- * anything besides the user context registers, and the siginfo_t,
- * then this hook need do nothing and may be omitted.
- * Otherwise, record the data and return; the caller will raise
- * the signal, unwind the cpu state, and return to the main loop.
- *
- * If it is simpler to re-use the sysemu do_unaligned_access code,
- * @ra is provided so that a "normal" cpu exception can be raised.
- * In this case, the signal must be raised by the architecture cpu_loop.
- */
- void (*record_sigbus)(CPUState *cpu, vaddr addr,
- MMUAccessType access_type, uintptr_t ra);
-#endif /* CONFIG_SOFTMMU */
+#endif /* !CONFIG_USER_ONLY */
#endif /* NEED_CPU_H */
};
--
2.38.1
- [PATCH v3 0/9] bulk: Replace CONFIG_SOFTMMU by !CONFIG_USER_ONLY/CONFIG_SYSTEM_ONLY, Philippe Mathieu-Daudé, 2023/06/13
- [PATCH v3 1/9] target/i386: Simplify i386_tr_init_disas_context(), Philippe Mathieu-Daudé, 2023/06/13
- [PATCH v3 2/9] target/tricore: Remove pointless CONFIG_SOFTMMU guard, Philippe Mathieu-Daudé, 2023/06/13
- [PATCH v3 3/9] target/m68k: Check for USER_ONLY definition instead of SOFTMMU one, Philippe Mathieu-Daudé, 2023/06/13
- [PATCH v3 4/9] target/ppc: Check for USER_ONLY definition instead of SOFTMMU one, Philippe Mathieu-Daudé, 2023/06/13
- [PATCH v3 5/9] hw/core/cpu: Check for USER_ONLY definition instead of SOFTMMU one,
Philippe Mathieu-Daudé <=
- [PATCH v3 6/9] accel/tcg: Check for USER_ONLY definition instead of SOFTMMU one, Philippe Mathieu-Daudé, 2023/06/13
- [PATCH v3 7/9] meson: Alias CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY, Philippe Mathieu-Daudé, 2023/06/13
- [PATCH v3 8/9] meson: Replace CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY, Philippe Mathieu-Daudé, 2023/06/13
- [PATCH v3 9/9] meson: Replace softmmu_ss -> system_ss, Philippe Mathieu-Daudé, 2023/06/13
- Re: [PATCH v3 0/9] bulk: Replace CONFIG_SOFTMMU by !CONFIG_USER_ONLY/CONFIG_SYSTEM_ONLY, Nicholas Piggin, 2023/06/14