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[PATCH 21/42] tcg/aarch64: Rename ext to d_type in tcg_out_qemu_ld
From: |
Richard Henderson |
Subject: |
[PATCH 21/42] tcg/aarch64: Rename ext to d_type in tcg_out_qemu_ld |
Date: |
Fri, 7 Apr 2023 19:42:53 -0700 |
The new name is slightly more descritive as "data type",
where "extend", despite the c type, sounds like a bool.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target.c.inc | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index 4ec3cf3172..40122e1471 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -1851,7 +1851,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, MemOp
memop,
}
static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
- MemOpIdx oi, TCGType ext)
+ MemOpIdx oi, TCGType d_type)
{
MemOp memop = get_memop(oi);
const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
@@ -1864,9 +1864,9 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg
data_reg, TCGReg addr_reg,
tcg_insn_unit *label_ptr;
tcg_out_tlb_read(s, addr_reg, memop, &label_ptr, mem_index, 1);
- tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
+ tcg_out_qemu_ld_direct(s, memop, d_type, data_reg,
TCG_REG_X1, otype, addr_reg);
- add_qemu_ldst_label(s, true, oi, ext, data_reg, addr_reg,
+ add_qemu_ldst_label(s, true, oi, d_type, data_reg, addr_reg,
s->code_ptr, label_ptr);
#else /* !CONFIG_SOFTMMU */
unsigned a_bits = get_alignment_bits(memop);
@@ -1874,10 +1874,10 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg
data_reg, TCGReg addr_reg,
tcg_out_test_alignment(s, true, addr_reg, a_bits);
}
if (USE_GUEST_BASE) {
- tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
+ tcg_out_qemu_ld_direct(s, memop, d_type, data_reg,
TCG_REG_GUEST_BASE, otype, addr_reg);
} else {
- tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
+ tcg_out_qemu_ld_direct(s, memop, d_type, data_reg,
addr_reg, TCG_TYPE_I64, TCG_REG_XZR);
}
#endif /* CONFIG_SOFTMMU */
--
2.34.1
- [PATCH 15/42] tcg: Split out tcg_out_extrl_i64_i32, (continued)
- [PATCH 15/42] tcg: Split out tcg_out_extrl_i64_i32, Richard Henderson, 2023/04/07
- [PATCH 16/42] tcg: Introduce tcg_out_movext, Richard Henderson, 2023/04/07
- [PATCH 17/42] tcg: Introduce tcg_out_xchg, Richard Henderson, 2023/04/07
- [PATCH 18/42] tcg: Introduce tcg_out_movext2, Richard Henderson, 2023/04/07
- [PATCH 19/42] tcg: Clear TCGLabelQemuLdst on allocation, Richard Henderson, 2023/04/07
- [PATCH 20/42] tcg/i386: Use TCGType not bool is_64 in tcg_out_qemu_{ld, st}, Richard Henderson, 2023/04/07
- [PATCH 22/42] tcg/aarch64: Pass TGType to tcg_out_qemu_st, Richard Henderson, 2023/04/07
- [PATCH 21/42] tcg/aarch64: Rename ext to d_type in tcg_out_qemu_ld,
Richard Henderson <=
- [PATCH 23/42] tcg/arm: Use TCGType not bool is_64 in tcg_out_qemu_{ld, st}, Richard Henderson, 2023/04/07
- [PATCH 25/42] tcg/ppc: Use TCGType not bool is_64 in tcg_out_qemu_{ld, st}, Richard Henderson, 2023/04/07
- [PATCH 24/42] tcg/i386: Use TCGType not bool is_64 in tcg_out_qemu_{ld, st}, Richard Henderson, 2023/04/07
- [PATCH 26/42] tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st}, Richard Henderson, 2023/04/07
- [PATCH 27/42] tcg/riscv: Require TCG_TARGET_REG_BITS == 64, Richard Henderson, 2023/04/07
- [PATCH 28/42] tcg/riscv: Expand arguments to tcg_out_qemu_{ld,st}, Richard Henderson, 2023/04/07