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Re: [PATCH v1 16/19] target/arm: Relax ordered/atomic alignment checks f
From: |
Peter Maydell |
Subject: |
Re: [PATCH v1 16/19] target/arm: Relax ordered/atomic alignment checks for LSE2 |
Date: |
Thu, 23 Feb 2023 17:22:27 +0000 |
On Thu, 23 Feb 2023 at 17:16, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 2/23/23 06:49, Peter Maydell wrote:
> > On Thu, 16 Feb 2023 at 03:09, Richard Henderson
> > <richard.henderson@linaro.org> wrote:
> >>
> >> FEAT_LSE2 only requires that atomic operations not cross a
> >> 16-byte boundary. Ordered operations may be completely
> >> unaligned if SCTLR.nAA is set.
> >>
> >> Because this alignment check is so special, do it by hand.
> >> Make sure not to keep TCG temps live across the branch.
> >>
> >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> >
> >
> >> +static void check_lse2_align(DisasContext *s, int rn, int imm,
> >> + bool is_write, MemOp mop)
> >> +{
> >> + TCGv_i32 tmp;
> >> + TCGv_i64 addr;
> >> + TCGLabel *over_label;
> >> + MMUAccessType type;
> >> + int mmu_idx;
> >> +
> >> + tmp = tcg_temp_new_i32();
> >> + tcg_gen_extrl_i64_i32(tmp, cpu_reg_sp(s, rn));
> >> + tcg_gen_addi_i32(tmp, tmp, imm & 15);
> >> + tcg_gen_andi_i32(tmp, tmp, 15);
> >> + tcg_gen_addi_i32(tmp, tmp, memop_size(mop));
> >> +
> >> + over_label = gen_new_label();
> >> + tcg_gen_brcond_i32(TCG_COND_LEU, tmp, tcg_constant_i32(16),
> >> over_label);
> >
> > This brcond ends the basic block and destroys the content
> > of TCG temporaries, which is bad because some of the
> > callsites have set some of those up before calling this
> > function (eg gen_compare_and_swap() has called cpu_reg()
> > which might have created and initialized a temporary
> > for xZR).
>
> xzr uses tcg_constant_i64(), which has no lifetime issues.
Hmm? cpu_reg() calls new_tmp_a64_zero() calls new_tmp_a64()
calls tcg_temp_new_i64(). What am I missing ?
> I've cc'd you on a patch set that fixes all the temporary lifetime stuff.
>
> v1:
> https://patchew.org/QEMU/20230130205935.1157347-1-richard.henderson@linaro.org/
> v2:
> https://patchew.org/QEMU/20230222232715.15034-1-richard.henderson@linaro.org/
Cool!
thanks
-- PMM
- Re: [PATCH v1 14/19] target/arm: Check alignment in helper_mte_check, (continued)
[PATCH v1 18/19] test/tcg/multiarch: Adjust sigbus.c, Richard Henderson, 2023/02/15
[PATCH v1 19/19] target/arm: Enable FEAT_LSE2 for -cpu max, Richard Henderson, 2023/02/15