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[PATCH 5/9] target/arm: Restrict CPUARMState::gicv3state to sysemu
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH 5/9] target/arm: Restrict CPUARMState::gicv3state to sysemu |
Date: |
Mon, 6 Feb 2023 13:17:10 +0100 |
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/arm/cpu.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 01d478e9ce..61681101a5 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -772,10 +772,10 @@ typedef struct CPUArchState {
int eabi;
#else
const struct arm_boot_info *boot_info;
-#endif
- void *nvic;
/* Store GICv3CPUState to access from this struct */
void *gicv3state;
+#endif
+ void *nvic;
#ifdef TARGET_TAGGED_ADDRESSES
/* Linux syscall tagged address support */
--
2.38.1
- [PATCH 0/9] target/arm: Housekeeping around NVIC, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH 1/9] target/arm: Restrict v7-M MMU helpers to sysemu TCG, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH 2/9] target/arm: Constify ID_PFR1 on user emulation, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH 5/9] target/arm: Restrict CPUARMState::gicv3state to sysemu,
Philippe Mathieu-Daudé <=
- [PATCH 3/9] target/arm: Avoid resetting CPUARMState::eabi field, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH 4/9] target/arm: Restrict CPUARMState::arm_boot_info to sysemu, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH 6/9] target/arm: Restrict CPUARMState::nvic to sysemu and store as NVICState*, Philippe Mathieu-Daudé, 2023/02/06
- [PATCH 7/9] target/arm: Declare CPU <-> NVIC helpers in 'hw/intc/armv7m_nvic.h', Philippe Mathieu-Daudé, 2023/02/06