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Re: [PATCH qemu.git v2 8/9] hw/timer/imx_epit: change reset handling
From: |
Peter Maydell |
Subject: |
Re: [PATCH qemu.git v2 8/9] hw/timer/imx_epit: change reset handling |
Date: |
Fri, 18 Nov 2022 15:58:40 +0000 |
On Mon, 7 Nov 2022 at 16:42, ~axelheider <axelheider@git.sr.ht> wrote:
>
> From: Axel Heider <axel.heider@hensoldt.net>
>
> - inline software reset
> - make hardware reset invoke software reset
> - simplify code flow
I think this patch is fixing a bug, right? We weren't
previously clearing CR for the hardware reset. If so,
that's worth noting in the commit message.
> Signed-off-by: Axel Heider <axel.heider@hensoldt.net>
> +static void imx_epit_reset(DeviceState *dev)
> +{
> + IMXEPITState *s = IMX_EPIT(dev);
> +
> + /* initialize CR and perform a software reset */
> + s->cr = 0;
> + imx_epit_write_cr(s, CR_SWR);
> +}
Generally we prefer not to do this for the hardware reset
function, as it makes it harder to see what the reset
is doing (eg to confirm that it isn't changing qemu IRQ
state). You can have a common helper function to do the
work of the reset though if that helps.
thanks
-- PMM
- Re: [PATCH qemu.git v2 5/9] hw/timer/imx_epit: do not persist CR.SWR bit, (continued)
- [PATCH qemu.git v2 3/9] hw/timer/imx_epit: simplify interrupt logic, ~axelheider, 2022/11/07
- [PATCH qemu.git v2 2/9] hw/timer/imx_epit: cleanup CR defines, ~axelheider, 2022/11/07
- [PATCH qemu.git v2 9/9] hw/timer/imx_epit: fix compare timer handling, ~axelheider, 2022/11/07
- [PATCH qemu.git v2 8/9] hw/timer/imx_epit: change reset handling, ~axelheider, 2022/11/07
- Re: [PATCH qemu.git v2 8/9] hw/timer/imx_epit: change reset handling,
Peter Maydell <=
- [PATCH qemu.git v2 6/9] hw/timer/imx_epit: remove explicit fields cnt and freq, ~axelheider, 2022/11/07
- [PATCH qemu.git v2 7/9] hw/timer/imx_epit: factor out register write handlers, ~axelheider, 2022/11/07