Re: [PATCH qemu.git v2 4/9] hw/timer/imx_epit: software reset clears the interrupt

[Peter Maydell]

On Mon, 7 Nov 2022 at 16:42, ~axelheider <axelheider@git.sr.ht> wrote:
>
> From: Axel Heider <axel.heider@hensoldt.net>
>
> Signed-off-by: Axel Heider <axel.heider@hensoldt.net>
> ---
>  hw/timer/imx_epit.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c
> index 2e9dae0bc8..5315d9633e 100644
> --- a/hw/timer/imx_epit.c
> +++ b/hw/timer/imx_epit.c
> @@ -94,6 +94,10 @@ static void imx_epit_reset(DeviceState *dev)
>      s->lr = EPIT_TIMER_MAX;
>      s->cmp = 0;
>      s->cnt = 0;
> +
> +    /* clear the interrupt */
> +    qemu_irq_lower(s->irq);
> +
>      ptimer_transaction_begin(s->timer_cmp);
>      ptimer_transaction_begin(s->timer_reload);
>      /* stop both timers */
> --

It's not valid to call qemu_irq_set/qemu_irq_lower from a legacy
reset function (because whether it has an effect or not
depends on whether the device on the other end of the line gets
reset before or after this one, and there is no guaranteed
order for devices being reset). The convention is that if the
post-reset state of the IRQ line is 0, then you don't do anything.
The device on the other end will reset into a state corresponding
to "the input line is 0".

thanks
-- PMM