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[PATCH v3 04/15] target/arm: ensure KVM traps set appropriate MemTxAttrs
From: |
Alex Bennée |
Subject: |
[PATCH v3 04/15] target/arm: ensure KVM traps set appropriate MemTxAttrs |
Date: |
Tue, 27 Sep 2022 15:14:53 +0100 |
Although most KVM users will use the in-kernel GIC emulation it is
perfectly possible not to. In this case we need to ensure the
MemTxAttrs are correctly populated so the GIC can divine the source
CPU of the operation.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
v3
- new for v3
---
target/arm/kvm.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index e5c1bd50d2..05056562f4 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -801,13 +801,14 @@ MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run
*run)
{
ARMCPU *cpu;
uint32_t switched_level;
+ MemTxAttrs attrs = MEMTXATTRS_CPU(cs);
if (kvm_irqchip_in_kernel()) {
/*
* We only need to sync timer states with user-space interrupt
* controllers, so return early and save cycles if we don't.
*/
- return MEMTXATTRS_UNSPECIFIED;
+ return attrs;
}
cpu = ARM_CPU(cs);
@@ -848,7 +849,7 @@ MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run
*run)
qemu_mutex_unlock_iothread();
}
- return MEMTXATTRS_UNSPECIFIED;
+ return attrs;
}
void kvm_arm_vm_state_change(void *opaque, bool running, RunState state)
@@ -1003,6 +1004,10 @@ int kvm_arch_fixup_msi_route(struct
kvm_irq_routing_entry *route,
hwaddr xlat, len, doorbell_gpa;
MemoryRegionSection mrs;
MemoryRegion *mr;
+ MemTxAttrs attrs = {
+ .requester_type = MTRT_PCI,
+ .requester_id = pci_requester_id(dev)
+ };
if (as == &address_space_memory) {
return 0;
@@ -1012,8 +1017,7 @@ int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry
*route,
RCU_READ_LOCK_GUARD();
- mr = address_space_translate(as, address, &xlat, &len, true,
- MEMTXATTRS_UNSPECIFIED);
+ mr = address_space_translate(as, address, &xlat, &len, true, attrs);
if (!mr) {
return 1;
--
2.34.1
- [PATCH v3 06/15] target/arm: ensure m-profile helpers set appropriate MemTxAttrs, (continued)
- [PATCH v3 06/15] target/arm: ensure m-profile helpers set appropriate MemTxAttrs, Alex Bennée, 2022/09/27
- [PATCH v3 03/15] target/arm: ensure HVF traps set appropriate MemTxAttrs, Alex Bennée, 2022/09/27
- [PATCH v3 02/15] target/arm: ensure TCG IO accesses set appropriate MemTxAttrs, Alex Bennée, 2022/09/27
- [PATCH v3 09/15] hw/timer: convert mptimer access to attrs to derive cpu index, Alex Bennée, 2022/09/27
- [PATCH v3 05/15] target/arm: ensure ptw accesses set appropriate MemTxAttrs, Alex Bennée, 2022/09/27
- [PATCH v3 04/15] target/arm: ensure KVM traps set appropriate MemTxAttrs,
Alex Bennée <=
- [PATCH v3 11/15] gdbstub: move into its own sub directory, Alex Bennée, 2022/09/27
- [PATCH v3 07/15] qtest: make read/write operation appear to be from CPU, Alex Bennée, 2022/09/27
- [PATCH v3 14/15] gdbstub: move guest debug support check to ops, Alex Bennée, 2022/09/27
- [PATCH v3 08/15] hw/intc/gic: use MxTxAttrs to divine accessing CPU, Alex Bennée, 2022/09/27
- [PATCH v3 10/15] configure: move detected gdb to TCG's config-host.mak, Alex Bennée, 2022/09/27
- [PATCH v3 13/15] gdbstub: move breakpoint logic to accel ops, Alex Bennée, 2022/09/27
- [PATCH v3 15/15] accel/kvm: move kvm_update_guest_debug to inline stub, Alex Bennée, 2022/09/27