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[PATCH v2 20/66] target/arm: Add is_secure parameter to get_phys_addr_pm
From: |
Richard Henderson |
Subject: |
[PATCH v2 20/66] target/arm: Add is_secure parameter to get_phys_addr_pmsav5 |
Date: |
Mon, 22 Aug 2022 08:26:55 -0700 |
Remove the use of regime_is_secure from get_phys_addr_pmsav5.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/ptw.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index eca7763367..c338e2324a 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -1350,13 +1350,12 @@ do_fault:
static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address,
MMUAccessType access_type, ARMMMUIdx mmu_idx,
- GetPhysAddrResult *result,
+ bool is_secure, GetPhysAddrResult *result,
ARMMMUFaultInfo *fi)
{
int n;
uint32_t mask;
uint32_t base;
- bool is_secure = regime_is_secure(env, mmu_idx);
bool is_user = regime_is_user(env, mmu_idx);
if (regime_translation_disabled(env, mmu_idx, is_secure)) {
@@ -2420,7 +2419,7 @@ bool get_phys_addr(CPUARMState *env, target_ulong address,
} else {
/* Pre-v7 MPU */
ret = get_phys_addr_pmsav5(env, address, access_type, mmu_idx,
- result, fi);
+ is_secure, result, fi);
}
qemu_log_mask(CPU_LOG_MMU, "PMSA MPU lookup for %s at 0x%08" PRIx32
" mmu_idx %u -> %s (prot %c%c%c)\n",
--
2.34.1
- [PATCH v2 12/66] target/arm: Add secure parameter to pmsav8_mpu_lookup, (continued)
- [PATCH v2 12/66] target/arm: Add secure parameter to pmsav8_mpu_lookup, Richard Henderson, 2022/08/22
- [PATCH v2 11/66] target/arm: Add is_secure parameter to v8m_security_lookup, Richard Henderson, 2022/08/22
- [PATCH v2 10/66] target/arm: Remove is_subpage argument to pmsav8_mpu_lookup, Richard Henderson, 2022/08/22
- [PATCH v2 09/66] target/arm: Use GetPhysAddrResult in pmsav8_mpu_lookup, Richard Henderson, 2022/08/22
- [PATCH v2 13/66] target/arm: Add is_secure parameter to get_phys_addr_v5, Richard Henderson, 2022/08/22
- [PATCH v2 15/66] target/arm: Add secure parameter to get_phys_addr_pmsav8, Richard Henderson, 2022/08/22
- [PATCH v2 17/66] target/arm: Add is_secure parameter to get_phys_addr_lpae, Richard Henderson, 2022/08/22
- [PATCH v2 18/66] target/arm: Add secure parameter to get_phys_addr_pmsav7, Richard Henderson, 2022/08/22
- [PATCH v2 16/66] target/arm: Add is_secure parameter to pmsav7_use_background_region, Richard Henderson, 2022/08/22
- [PATCH v2 14/66] target/arm: Add is_secure parameter to get_phys_addr_v6, Richard Henderson, 2022/08/22
- [PATCH v2 20/66] target/arm: Add is_secure parameter to get_phys_addr_pmsav5,
Richard Henderson <=
- [PATCH v2 19/66] target/arm: Add is_secure parameter to regime_translation_disabled, Richard Henderson, 2022/08/22
- [PATCH v2 21/66] target/arm: Split out get_phys_addr_with_secure, Richard Henderson, 2022/08/22
- [PATCH v2 23/66] target/arm: Add TBFLAG_M32.SECURE, Richard Henderson, 2022/08/22
- [PATCH v2 24/66] target/arm: Merge regime_is_secure into get_phys_addr, Richard Henderson, 2022/08/22
- [PATCH v2 22/66] target/arm: Add is_secure parameter to v7m_read_half_insn, Richard Henderson, 2022/08/22
- [PATCH v2 25/66] target/arm: Add is_secure parameter to do_ats_write, Richard Henderson, 2022/08/22
- [PATCH v2 28/66] target/arm: Drop secure check for HCR.TGE vs SCTLR_EL1.M, Richard Henderson, 2022/08/22
- [PATCH v2 27/66] target/arm: Reorg regime_translation_disabled, Richard Henderson, 2022/08/22
- [PATCH v2 26/66] target/arm: Fold secure and non-secure a-profile mmu indexes, Richard Henderson, 2022/08/22
- [PATCH v2 29/66] target/arm: Introduce arm_hcr_el2_eff_secstate, Richard Henderson, 2022/08/22