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Re: [PATCH 05/14] aspeed: i2c: Fix R_I2CD_FUN_CTRL reference
From: |
Peter Delevoryas |
Subject: |
Re: [PATCH 05/14] aspeed: i2c: Fix R_I2CD_FUN_CTRL reference |
Date: |
Tue, 28 Jun 2022 07:05:34 +0000 |
> On Jun 28, 2022, at 12:01 AM, Cédric Le Goater <clg@kaod.org> wrote:
>
> On 6/27/22 21:54, Peter Delevoryas wrote:
>> Very minor, doesn't effect functionality, but this is supposed to be
>> R_I2CC_FUN_CTRL (new-mode, not old-mode).
>> Fixes: ba2cccd64e9 ("aspeed: i2c: Add new mode support")
>> Signed-off-by: Peter Delevoryas <pdel@fb.com>
>> ---
>
>
> Can you move this patch at beginning of the series ?
Yep, will-do.
>
> Reviewed-by: Cédric Le Goater <clg@kaod.org>
>
> Thanks,
>
> C.
>
>
>
>> hw/i2c/aspeed_i2c.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>> diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
>> index 6c8222717f..6abd9b033e 100644
>> --- a/hw/i2c/aspeed_i2c.c
>> +++ b/hw/i2c/aspeed_i2c.c
>> @@ -552,7 +552,7 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus,
>> hwaddr offset,
>> __func__);
>> break;
>> }
>> - bus->regs[R_I2CD_FUN_CTRL] = value & 0x007dc3ff;
>> + bus->regs[R_I2CC_FUN_CTRL] = value & 0x007dc3ff;
>> break;
>> case A_I2CC_AC_TIMING:
>> bus->regs[R_I2CC_AC_TIMING] = value & 0x1ffff0ff;
>
- [PATCH 00/14] aspeed: Add I2C new register DMA slave mode support, Peter Delevoryas, 2022/06/27
- [PATCH 02/14] hw/i2c: add asynchronous send, Peter Delevoryas, 2022/06/27
- [PATCH 01/14] hw/i2c: support multiple masters, Peter Delevoryas, 2022/06/27
- [PATCH 03/14] hw/i2c/aspeed: add slave device in old register mode, Peter Delevoryas, 2022/06/27
- [PATCH 05/14] aspeed: i2c: Fix R_I2CD_FUN_CTRL reference, Peter Delevoryas, 2022/06/27
- [PATCH 08/14] hw/misc: Add fby35-cpld, Peter Delevoryas, 2022/06/27
- [PATCH 04/14] aspeed: i2c: Fix DMA len write-enable bit handling, Peter Delevoryas, 2022/06/27
- [PATCH 07/14] aspeed: Add PECI controller, Peter Delevoryas, 2022/06/27
- [PATCH 09/14] pmbus: Reset out buf after switching pages, Peter Delevoryas, 2022/06/27