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[PATCH v2 17/17] aspeed/i2c: Enable SLAVE_ADDR_RX_MATCH always
From: |
Cédric Le Goater |
Subject: |
[PATCH v2 17/17] aspeed/i2c: Enable SLAVE_ADDR_RX_MATCH always |
Date: |
Mon, 13 Jun 2022 15:25:39 +0200 |
There is no 'slave match interrupt' enable bit in the Interrupt
Control Register. Consider it is always enabled and extend the mask
value 'bus->regs[intr_ctrl_reg]' with the SLAVE_ADDR_RX_MATCH bit when
the interrupt is raised.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/i2c/aspeed_i2c.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index f9fce0d84b89..37ae1f2e04bd 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -32,15 +32,20 @@
#include "hw/registerfields.h"
#include "trace.h"
+/* Enable SLAVE_ADDR_RX_MATCH always */
+#define R_I2CD_INTR_STS_ALWAYS_ENABLE R_I2CD_INTR_STS_SLAVE_ADDR_RX_MATCH_MASK
+
static inline void aspeed_i2c_bus_raise_interrupt(AspeedI2CBus *bus)
{
AspeedI2CClass *aic = ASPEED_I2C_GET_CLASS(bus->controller);
uint32_t reg_intr_sts = aspeed_i2c_bus_intr_sts_offset(bus);
uint32_t intr_ctrl_reg = aspeed_i2c_bus_intr_ctrl_offset(bus);
+ uint32_t intr_ctrl_mask = bus->regs[intr_ctrl_reg] |
+ R_I2CD_INTR_STS_ALWAYS_ENABLE;
bool raise_irq;
if (trace_event_get_state_backends(TRACE_ASPEED_I2C_BUS_RAISE_INTERRUPT)) {
- g_autofree char *buf = g_strdup_printf("%s%s%s%s%s%s",
+ g_autofree char *buf = g_strdup_printf("%s%s%s%s%s%s%s",
aspeed_i2c_bus_pkt_mode_en(bus) &&
ARRAY_FIELD_EX32(bus->regs, I2CM_INTR_STS, PKT_CMD_DONE) ?
"pktdone|" : "",
@@ -50,6 +55,8 @@ static inline void
aspeed_i2c_bus_raise_interrupt(AspeedI2CBus *bus)
"ack|" : "",
SHARED_ARRAY_FIELD_EX32(bus->regs, reg_intr_sts, RX_DONE) ?
"done|" : "",
+ ARRAY_FIELD_EX32(bus->regs, I2CD_INTR_STS, SLAVE_ADDR_RX_MATCH)
?
+ "slave-match|" : "",
SHARED_ARRAY_FIELD_EX32(bus->regs, reg_intr_sts, NORMAL_STOP) ?
"normal|" : "",
SHARED_ARRAY_FIELD_EX32(bus->regs, reg_intr_sts, ABNORMAL) ?
@@ -58,11 +65,11 @@ static inline void
aspeed_i2c_bus_raise_interrupt(AspeedI2CBus *bus)
trace_aspeed_i2c_bus_raise_interrupt(bus->regs[reg_intr_sts], buf);
}
- raise_irq = bus->regs[reg_intr_sts] & bus->regs[intr_ctrl_reg];
+ raise_irq = bus->regs[reg_intr_sts] & intr_ctrl_mask ;
/* In packet mode we don't mask off INTR_STS */
if (!aspeed_i2c_bus_pkt_mode_en(bus)) {
- bus->regs[reg_intr_sts] &= bus->regs[intr_ctrl_reg];
+ bus->regs[reg_intr_sts] &= intr_ctrl_mask;
}
if (raise_irq) {
--
2.35.3
- [PATCH v2 09/17] aspeed: i2c: Use reg array instead of individual vars, (continued)
- [PATCH v2 09/17] aspeed: i2c: Use reg array instead of individual vars, Cédric Le Goater, 2022/06/13
- [PATCH v2 11/17] aspeed: i2c: Add PKT_DONE IRQ to trace, Cédric Le Goater, 2022/06/13
- [PATCH v2 07/17] hw/registerfields: Add shared fields macros, Cédric Le Goater, 2022/06/13
- [PATCH v2 10/17] aspeed: i2c: Add new mode support, Cédric Le Goater, 2022/06/13
- [PATCH v2 08/17] aspeed: i2c: Migrate to registerfields API, Cédric Le Goater, 2022/06/13
- [PATCH v2 12/17] aspeed: i2c: Move regs and helpers to header file, Cédric Le Goater, 2022/06/13
- [PATCH v2 13/17] aspeed/i2c: Add ast1030 controller models, Cédric Le Goater, 2022/06/13
- [PATCH v2 14/17] aspeed: Add I2C buses to AST1030 model, Cédric Le Goater, 2022/06/13
- [PATCH v2 15/17] hw/i2c/aspeed: rework raise interrupt trace event, Cédric Le Goater, 2022/06/13
- [PATCH v2 16/17] hw/i2c/aspeed: add DEV_ADDR in old register mode, Cédric Le Goater, 2022/06/13
- [PATCH v2 17/17] aspeed/i2c: Enable SLAVE_ADDR_RX_MATCH always,
Cédric Le Goater <=