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[PATCH 072/114] target/arm: Reject add/sub w/ shifted byte early
From: |
Richard Henderson |
Subject: |
[PATCH 072/114] target/arm: Reject add/sub w/ shifted byte early |
Date: |
Fri, 27 May 2022 11:18:25 -0700 |
Remove the unparsed extractions in trans_ADD_zzi, trans_SUBR_zzi,
and do_zzi_sat which are intended to reject an 8-bit shift of an
8-bit constant for 8-bit element.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/sve.decode | 35 ++++++++++++++++++++++++++++-------
target/arm/translate-sve.c | 9 ---------
2 files changed, 28 insertions(+), 16 deletions(-)
diff --git a/target/arm/sve.decode b/target/arm/sve.decode
index c02da0a082..8cff63cf25 100644
--- a/target/arm/sve.decode
+++ b/target/arm/sve.decode
@@ -793,13 +793,34 @@ FDUP 00100101 esz:2 111 00 1110 imm:8 rd:5
}
# SVE integer add/subtract immediate (unpredicated)
-ADD_zzi 00100101 .. 100 000 11 . ........ ..... @rdn_sh_i8u
-SUB_zzi 00100101 .. 100 001 11 . ........ ..... @rdn_sh_i8u
-SUBR_zzi 00100101 .. 100 011 11 . ........ ..... @rdn_sh_i8u
-SQADD_zzi 00100101 .. 100 100 11 . ........ ..... @rdn_sh_i8u
-UQADD_zzi 00100101 .. 100 101 11 . ........ ..... @rdn_sh_i8u
-SQSUB_zzi 00100101 .. 100 110 11 . ........ ..... @rdn_sh_i8u
-UQSUB_zzi 00100101 .. 100 111 11 . ........ ..... @rdn_sh_i8u
+{
+ INVALID 00100101 00 100 000 11 1 -------- -----
+ ADD_zzi 00100101 .. 100 000 11 . ........ ..... @rdn_sh_i8u
+}
+{
+ INVALID 00100101 00 100 001 11 1 -------- -----
+ SUB_zzi 00100101 .. 100 001 11 . ........ ..... @rdn_sh_i8u
+}
+{
+ INVALID 00100101 00 100 011 11 1 -------- -----
+ SUBR_zzi 00100101 .. 100 011 11 . ........ ..... @rdn_sh_i8u
+}
+{
+ INVALID 00100101 00 100 100 11 1 -------- -----
+ SQADD_zzi 00100101 .. 100 100 11 . ........ ..... @rdn_sh_i8u
+}
+{
+ INVALID 00100101 00 100 101 11 1 -------- -----
+ UQADD_zzi 00100101 .. 100 101 11 . ........ ..... @rdn_sh_i8u
+}
+{
+ INVALID 00100101 00 100 110 11 1 -------- -----
+ SQSUB_zzi 00100101 .. 100 110 11 . ........ ..... @rdn_sh_i8u
+}
+{
+ INVALID 00100101 00 100 111 11 1 -------- -----
+ UQSUB_zzi 00100101 .. 100 111 11 . ........ ..... @rdn_sh_i8u
+}
# SVE integer min/max immediate (unpredicated)
SMAX_zzi 00100101 .. 101 000 110 ........ ..... @rdn_i8s
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 14faef0564..bf988cab3e 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -3262,9 +3262,6 @@ static bool trans_DUP_i(DisasContext *s, arg_DUP_i *a)
static bool trans_ADD_zzi(DisasContext *s, arg_rri_esz *a)
{
- if (a->esz == 0 && extract32(s->insn, 13, 1)) {
- return false;
- }
return gen_gvec_fn_arg_zzi(s, tcg_gen_gvec_addi, a);
}
@@ -3305,9 +3302,6 @@ static bool trans_SUBR_zzi(DisasContext *s, arg_rri_esz
*a)
.scalar_first = true }
};
- if (a->esz == 0 && extract32(s->insn, 13, 1)) {
- return false;
- }
if (sve_access_check(s)) {
unsigned vsz = vec_full_reg_size(s);
tcg_gen_gvec_2s(vec_full_reg_offset(s, a->rd),
@@ -3321,9 +3315,6 @@ TRANS_FEAT(MUL_zzi, aa64_sve, gen_gvec_fn_arg_zzi,
tcg_gen_gvec_muli, a)
static bool do_zzi_sat(DisasContext *s, arg_rri_esz *a, bool u, bool d)
{
- if (a->esz == 0 && extract32(s->insn, 13, 1)) {
- return false;
- }
if (sve_access_check(s)) {
do_sat_addsub_vec(s, a->esz, a->rd, a->rn,
tcg_constant_i64(a->imm), u, d);
--
2.34.1
- [PATCH 052/114] target/arm: Use TRANS_FEAT for RDFFR, WRFFR, (continued)
- [PATCH 052/114] target/arm: Use TRANS_FEAT for RDFFR, WRFFR, Richard Henderson, 2022/05/27
- [PATCH 051/114] target/arm: Use TRANS_FEAT for do_predset, Richard Henderson, 2022/05/27
- [PATCH 047/114] target/arm: Use TRANS_FEAT for do_zpzzz_ool, Richard Henderson, 2022/05/27
- [PATCH 054/114] target/arm: Use TRANS_FEAT for do_EXT, Richard Henderson, 2022/05/27
- [PATCH 055/114] target/arm: Use TRANS_FEAT for do_perm_pred3, Richard Henderson, 2022/05/27
- [PATCH 057/114] target/arm: Move sve zip high_ofs into simd_data, Richard Henderson, 2022/05/27
- [PATCH 061/114] target/arm: Use TRANS_FEAT for do_clast_fp, Richard Henderson, 2022/05/27
- [PATCH 040/114] target/arm: Hoist sve access check through do_sel_z, Richard Henderson, 2022/05/27
- [PATCH 064/114] target/arm: Use TRANS_FEAT for do_last_general, Richard Henderson, 2022/05/27
- [PATCH 068/114] target/arm: Use TRANS_FEAT for do_ppzi_flags, Richard Henderson, 2022/05/27
- [PATCH 072/114] target/arm: Reject add/sub w/ shifted byte early,
Richard Henderson <=
- [PATCH 077/114] target/arm: Introduce gen_gvec_{ptr,fpst}_zzzz, Richard Henderson, 2022/05/27
- [PATCH 059/114] target/arm: Use TRANS_FEAT for do_zip, do_zip_q, Richard Henderson, 2022/05/27
- [PATCH 074/114] target/arm: Use TRANS_FEAT for ADD_zzi, Richard Henderson, 2022/05/27
- [PATCH 067/114] target/arm: Use TRANS_FEAT for do_sve2_ppzz_flags, Richard Henderson, 2022/05/27
- [PATCH 076/114] target/arm: Use TRANS_FEAT for do_zzi_ool, Richard Henderson, 2022/05/27
- [PATCH 075/114] target/arm: Use TRANS_FEAT for do_zzi_sat, Richard Henderson, 2022/05/27
- [PATCH 056/114] target/arm: Use TRANS_FEAT for do_perm_pred2, Richard Henderson, 2022/05/27
- [PATCH 063/114] target/arm: Use TRANS_FEAT for do_last_fp, Richard Henderson, 2022/05/27
- [PATCH 062/114] target/arm: Use TRANS_FEAT for do_clast_general, Richard Henderson, 2022/05/27
- [PATCH 060/114] target/arm: Use TRANS_FEAT for do_clast_vector, Richard Henderson, 2022/05/27