[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 036/114] target/arm: Introduce gen_gvec_fn_arg_zzzz
From: |
Richard Henderson |
Subject: |
[PATCH 036/114] target/arm: Introduce gen_gvec_fn_arg_zzzz |
Date: |
Fri, 27 May 2022 11:17:49 -0700 |
Merge gen_gvec_fn_zzzz with the sve access check and the
dereference of arg_rrrr_esz.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-sve.c | 25 ++++++++++++++-----------
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 36d739d7b2..e0b083f861 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -281,14 +281,20 @@ static bool gen_gvec_fn_arg_zzz(DisasContext *s,
GVecGen3Fn *fn,
}
/* Invoke a vector expander on four Zregs. */
-static void gen_gvec_fn_zzzz(DisasContext *s, GVecGen4Fn *gvec_fn,
- int esz, int rd, int rn, int rm, int ra)
+static bool gen_gvec_fn_arg_zzzz(DisasContext *s, GVecGen4Fn *gvec_fn,
+ arg_rrrr_esz *a)
{
- unsigned vsz = vec_full_reg_size(s);
- gvec_fn(esz, vec_full_reg_offset(s, rd),
- vec_full_reg_offset(s, rn),
- vec_full_reg_offset(s, rm),
- vec_full_reg_offset(s, ra), vsz, vsz);
+ if (gvec_fn == NULL) {
+ return false;
+ }
+ if (sve_access_check(s)) {
+ unsigned vsz = vec_full_reg_size(s);
+ gvec_fn(a->esz, vec_full_reg_offset(s, a->rd),
+ vec_full_reg_offset(s, a->rn),
+ vec_full_reg_offset(s, a->rm),
+ vec_full_reg_offset(s, a->ra), vsz, vsz);
+ }
+ return true;
}
/* Invoke a vector move on two Zregs. */
@@ -490,10 +496,7 @@ static bool do_sve2_zzzz_fn(DisasContext *s, arg_rrrr_esz
*a, GVecGen4Fn *fn)
if (!dc_isar_feature(aa64_sve2, s)) {
return false;
}
- if (sve_access_check(s)) {
- gen_gvec_fn_zzzz(s, fn, a->esz, a->rd, a->rn, a->rm, a->ra);
- }
- return true;
+ return gen_gvec_fn_arg_zzzz(s, fn, a);
}
static void gen_eor3_i64(TCGv_i64 d, TCGv_i64 n, TCGv_i64 m, TCGv_i64 k)
--
2.34.1
- [PATCH 026/114] target/arm: Introduce gen_gvec_ool_arg_zpzz, (continued)
- [PATCH 026/114] target/arm: Introduce gen_gvec_ool_arg_zpzz, Richard Henderson, 2022/05/27
- [PATCH 030/114] target/arm: Move null function and sve check into gen_gvec_fn_zzz, Richard Henderson, 2022/05/27
- [PATCH 031/114] target/arm: Rename do_zzz_fn to gen_gvec_fn_arg_zzz, Richard Henderson, 2022/05/27
- [PATCH 029/114] target/arm: Merge gen_gvec_fn_zz into do_mov_z, Richard Henderson, 2022/05/27
- [PATCH 028/114] target/arm: Use TRANS_FEAT for do_sve2_zpzz_ool, Richard Henderson, 2022/05/27
- [PATCH 023/114] target/arm: Rename do_zpzi_ool to gen_gvec_ool_arg_zpzi, Richard Henderson, 2022/05/27
- [PATCH 034/114] target/arm: Use TRANS_FEAT for do_sve2_fn_zzz, Richard Henderson, 2022/05/27
- [PATCH 035/114] target/arm: Use TRANS_FEAT for RAX1, Richard Henderson, 2022/05/27
- [PATCH 032/114] target/arm: More use of gen_gvec_fn_arg_zzz, Richard Henderson, 2022/05/27
- [PATCH 033/114] target/arm: Use TRANS_FEAT for gen_gvec_fn_arg_zzz, Richard Henderson, 2022/05/27
- [PATCH 036/114] target/arm: Introduce gen_gvec_fn_arg_zzzz,
Richard Henderson <=
- [PATCH 038/114] target/arm: Introduce gen_gvec_fn_zzi, Richard Henderson, 2022/05/27
- [PATCH 039/114] target/arm: Use TRANS_FEAT for do_zz_dbm, Richard Henderson, 2022/05/27
- [PATCH 037/114] target/arm: Use TRANS_FEAT for do_sve2_zzzz_fn, Richard Henderson, 2022/05/27
- [PATCH 050/114] target/arm: Use TRANS_FEAT for do_adr, Richard Henderson, 2022/05/27
- [PATCH 049/114] target/arm: Use TRANS_FEAT for do_index, Richard Henderson, 2022/05/27
- [PATCH 041/114] target/arm: Introduce gen_gvec_fn_arg_zzi, Richard Henderson, 2022/05/27
- [PATCH 046/114] target/arm: Use TRANS_FEAT for do_shift_zpzi, Richard Henderson, 2022/05/27
- [PATCH 042/114] target/arm: Use TRANS_FEAT for do_sve2_fn2i, Richard Henderson, 2022/05/27
- [PATCH 044/114] target/arm: Use TRANS_FEAT for do_shift_imm, Richard Henderson, 2022/05/27
- [PATCH 043/114] target/arm: Use TRANS_FEAT for do_vpz_ool, Richard Henderson, 2022/05/27