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Re: [PATCH] hw/gpio/aspeed_gpio: Fix QOM pin property
From: |
Rashmica Gupta |
Subject: |
Re: [PATCH] hw/gpio/aspeed_gpio: Fix QOM pin property |
Date: |
Wed, 18 May 2022 17:31:05 +1000 |
User-agent: |
Evolution 3.42.4 (3.42.4-2.fc35) |
On Mon, 2022-05-02 at 01:08 -0700, Peter Delevoryas wrote:
> I was setting gpioV4-7 to "1110" using the QOM pin property handler
> and
> noticed that lowering gpioV7 was inadvertently lowering gpioV4-6 too.
>
> (qemu) qom-set /machine/soc/gpio gpioV4 true
> (qemu) qom-set /machine/soc/gpio gpioV5 true
> (qemu) qom-set /machine/soc/gpio gpioV6 true
> (qemu) qom-get /machine/soc/gpio gpioV4
> true
> (qemu) qom-set /machine/soc/gpio gpioV7 false
> (qemu) qom-get /machine/soc/gpio gpioV4
> false
>
> An expression in aspeed_gpio_set_pin_level was using a logical NOT
> operator instead of a bitwise NOT operator:
>
> value &= !pin_mask;
>
> The original author probably intended to make a bitwise NOT
> expression
> "~", but mistakenly used a logical NOT operator "!" instead. Some
> programming languages like Rust use "!" for both purposes.
>
> Fixes: 4b7f956862dc ("hw/gpio: Add basic Aspeed GPIO model for
> AST2400 and
> AST2500")
> Signed-off-by: Peter Delevoryas <pdel@fb.com>
Oops! Thanks for catching this. The tests look good.