Re: [PATCH v4 20/45] target/arm: Handle cpreg registration for missing EL

[Peter Maydell]

On Sun, 1 May 2022 at 07:21, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> More gracefully handle cpregs when EL2 and/or EL3 are missing.
> If the reg is entirely inaccessible, do not register it at all.
> If the reg is for EL2, and EL3 is present but EL2 is not,
> either discard, squash to const, or keep unchanged.
>
> Per rule RJFFP, mark the 4 aarch32 hypervisor access registers
> with ARM_CP_EL3_NO_EL2_KEEP, and mark all of the EL2 address
> translation and tlb invalidation "regs" ARM_CP_EL3_NO_EL2_UNDEF.
>
> This will simplify cpreg registration for conditional arm features.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> v4: Add ARM_CP_EL3_NO_EL2_{UNDEF,KEEP}.
> ---
>  target/arm/cpregs.h |   9 +++
>  target/arm/helper.c | 163 ++++++++++++++++++++++++++++++--------------
>  2 files changed, 120 insertions(+), 52 deletions(-)
>
> diff --git a/target/arm/cpregs.h b/target/arm/cpregs.h
> index 73984549d2..9ed94d7121 100644
> --- a/target/arm/cpregs.h
> +++ b/target/arm/cpregs.h
> @@ -102,6 +102,15 @@ enum {
>      ARM_CP_SVE                   = 1 << 14,
>      /* Flag: Do not expose in gdb sysreg xml. */
>      ARM_CP_NO_GDB                = 1 << 15,
> +    /*
> +     * Flags: If EL3 but not EL2...
> +     *   - UNDEF: discard the cpreg,
> +     *   -  KEEP: retain the cpreg as is,
> +     *   -  else: set CONST on the cpreg.
> +     * See rule RJFFP in section D1.1.3 of DDI0487H.a.
> +     */
> +    ARM_CP_EL3_NO_EL2_UNDEF      = 1 << 16,
> +    ARM_CP_EL3_NO_EL2_KEEP       = 1 << 17,
>  };

"set CONST on the cpreg" is what the code does, but it's not
what the architecture wants. In particular, if the EL2 cpreg defines
a non-zero resetvalue then the EL3-no-EL2 CPU will get a
"reads as constant that value" rather than "reads as zero".
CNTHCTL_EL2 and MDCR_EL2 are examples of this.

thanks
-- PMM