[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user
From: |
Peter Maydell |
Subject: |
Re: [PATCH] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user |
Date: |
Tue, 3 May 2022 16:24:43 +0100 |
On Thu, 28 Apr 2022 at 16:19, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 4/28/22 05:56, Peter Maydell wrote:
> > On Wed, 27 Apr 2022 at 05:23, Richard Henderson
> > <richard.henderson@linaro.org> wrote:
> >>
> >> This controls whether the PACI{A,B}SP instructions trap with BTYPE=3
> >> (indirect branch from register other than x16/x17). The linux kernel
> >> sets this in bti_enable().
> >>
> >> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/998
> >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> >
> >> --- a/tests/tcg/aarch64/Makefile.target
> >> +++ b/tests/tcg/aarch64/Makefile.target
> >> @@ -26,11 +26,11 @@ run-plugin-pauth-%: QEMU_OPTS += -cpu max
> >> endif
> >>
> >> # BTI Tests
> >> -# bti-1 tests the elf notes, so we require special compiler support.
> >> +# bti-1 test the elf notes, so we require special compiler support.
> >
> > Did you intend to edit this comment line ?
> >
> > Otherwise
> > Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
>
> Oops, no. At one point I had bti-3 sharing this line, and following code,
> but it didn't work.
OK; applied to target-arm.next with that line fixed up, thanks.
-- PMM
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- Re: [PATCH] target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user,
Peter Maydell <=