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[PATCH v4 22/45] target/arm: Merge zcr reginfo
From: |
Richard Henderson |
Subject: |
[PATCH v4 22/45] target/arm: Merge zcr reginfo |
Date: |
Sat, 30 Apr 2022 22:50:04 -0700 |
Drop zcr_no_el2_reginfo and merge the 3 registers into one array,
now that ZCR_EL2 can be squashed to RES0 and ZCR_EL3 dropped
while registering.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 55 ++++++++++++++-------------------------------
1 file changed, 17 insertions(+), 38 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index e24e0749ac..228472506d 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6122,35 +6122,22 @@ static void zcr_write(CPUARMState *env, const
ARMCPRegInfo *ri,
}
}
-static const ARMCPRegInfo zcr_el1_reginfo = {
- .name = "ZCR_EL1", .state = ARM_CP_STATE_AA64,
- .opc0 = 3, .opc1 = 0, .crn = 1, .crm = 2, .opc2 = 0,
- .access = PL1_RW, .type = ARM_CP_SVE,
- .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[1]),
- .writefn = zcr_write, .raw_writefn = raw_write
-};
-
-static const ARMCPRegInfo zcr_el2_reginfo = {
- .name = "ZCR_EL2", .state = ARM_CP_STATE_AA64,
- .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 2, .opc2 = 0,
- .access = PL2_RW, .type = ARM_CP_SVE,
- .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[2]),
- .writefn = zcr_write, .raw_writefn = raw_write
-};
-
-static const ARMCPRegInfo zcr_no_el2_reginfo = {
- .name = "ZCR_EL2", .state = ARM_CP_STATE_AA64,
- .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 2, .opc2 = 0,
- .access = PL2_RW, .type = ARM_CP_SVE,
- .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore
-};
-
-static const ARMCPRegInfo zcr_el3_reginfo = {
- .name = "ZCR_EL3", .state = ARM_CP_STATE_AA64,
- .opc0 = 3, .opc1 = 6, .crn = 1, .crm = 2, .opc2 = 0,
- .access = PL3_RW, .type = ARM_CP_SVE,
- .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[3]),
- .writefn = zcr_write, .raw_writefn = raw_write
+static const ARMCPRegInfo zcr_reginfo[] = {
+ { .name = "ZCR_EL1", .state = ARM_CP_STATE_AA64,
+ .opc0 = 3, .opc1 = 0, .crn = 1, .crm = 2, .opc2 = 0,
+ .access = PL1_RW, .type = ARM_CP_SVE,
+ .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[1]),
+ .writefn = zcr_write, .raw_writefn = raw_write },
+ { .name = "ZCR_EL2", .state = ARM_CP_STATE_AA64,
+ .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 2, .opc2 = 0,
+ .access = PL2_RW, .type = ARM_CP_SVE,
+ .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[2]),
+ .writefn = zcr_write, .raw_writefn = raw_write },
+ { .name = "ZCR_EL3", .state = ARM_CP_STATE_AA64,
+ .opc0 = 3, .opc1 = 6, .crn = 1, .crm = 2, .opc2 = 0,
+ .access = PL3_RW, .type = ARM_CP_SVE,
+ .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[3]),
+ .writefn = zcr_write, .raw_writefn = raw_write },
};
void hw_watchpoint_update(ARMCPU *cpu, int n)
@@ -8230,15 +8217,7 @@ void register_cp_regs_for_features(ARMCPU *cpu)
}
if (cpu_isar_feature(aa64_sve, cpu)) {
- define_one_arm_cp_reg(cpu, &zcr_el1_reginfo);
- if (arm_feature(env, ARM_FEATURE_EL2)) {
- define_one_arm_cp_reg(cpu, &zcr_el2_reginfo);
- } else {
- define_one_arm_cp_reg(cpu, &zcr_no_el2_reginfo);
- }
- if (arm_feature(env, ARM_FEATURE_EL3)) {
- define_one_arm_cp_reg(cpu, &zcr_el3_reginfo);
- }
+ define_arm_cp_regs(cpu, zcr_reginfo);
}
#ifdef TARGET_AARCH64
--
2.34.1
- [PATCH v4 16/45] target/arm: Hoist isbanked computation in add_cpreg_to_hashtable, (continued)
- [PATCH v4 16/45] target/arm: Hoist isbanked computation in add_cpreg_to_hashtable, Richard Henderson, 2022/05/01
- [PATCH v4 18/45] target/arm: Reformat comments in add_cpreg_to_hashtable, Richard Henderson, 2022/05/01
- [PATCH v4 09/45] target/arm: Name CPSecureState type, Richard Henderson, 2022/05/01
- [PATCH v4 14/45] target/arm: Consolidate cpreg updates in add_cpreg_to_hashtable, Richard Henderson, 2022/05/01
- [PATCH v4 12/45] target/arm: Merge allocation of the cpreg and its name, Richard Henderson, 2022/05/01
- [PATCH v4 25/45] target/arm: Move cortex impdef sysregs to cpu_tcg.c, Richard Henderson, 2022/05/01
- [PATCH v4 22/45] target/arm: Merge zcr reginfo,
Richard Henderson <=
- [PATCH v4 34/45] target/arm: Add minimal RAS registers, Richard Henderson, 2022/05/01
- [PATCH v4 33/45] target/arm: Add isar_feature_{aa64,any}_ras, Richard Henderson, 2022/05/01
- [PATCH v4 36/45] target/arm: Implement virtual SError exceptions, Richard Henderson, 2022/05/01
- [PATCH v4 17/45] target/arm: Perform override check early in add_cpreg_to_hashtable, Richard Henderson, 2022/05/01
- [PATCH v4 21/45] target/arm: Drop EL3 no EL2 fallbacks, Richard Henderson, 2022/05/01
- [PATCH v4 05/45] target/arm: Reorg ARMCPRegInfo type field bits, Richard Henderson, 2022/05/01