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Re: [PATCH v3 35/60] target/arm: Handle cpreg registration for missing E
From: |
Peter Maydell |
Subject: |
Re: [PATCH v3 35/60] target/arm: Handle cpreg registration for missing EL |
Date: |
Fri, 22 Apr 2022 11:57:44 +0100 |
On Sun, 17 Apr 2022 at 19:21, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> More gracefully handle cpregs when EL2 and/or EL3 are missing.
> If the reg is entirely inaccessible, do not register it at all.
> If the reg is for EL2, and EL3 is present but EL2 is not,
> squash to ARM_CP_CONST.
I don't think we should do this unconditionally. Just because
the architecture usually defines that an _EL2 register is
RES0 if EL2 is not present doesn't mean that it does so for
every register or that it guarantees that it will continue
to do so in future. (For instance I found ZCR_EL2 and TFSR_EL2
don't have that statement in their documentation, which might or
might not be an oversight.) You could add an ARM_CP_ flag for
"RES0 if no EL2" or something I guess?
thanks
-- PMM
- Re: [PATCH v3 24/60] target/arm: Split out cpregs.h, (continued)
- [PATCH v3 17/60] target/arm: Use tcg_constant in translate.c, Richard Henderson, 2022/04/17
- [PATCH v3 23/60] target/arm: Use tcg_constant_i32 in translate.h, Richard Henderson, 2022/04/17
- [PATCH v3 26/60] target/arm: Replace sentinels with ARRAY_SIZE in cpregs.h, Richard Henderson, 2022/04/17
- [PATCH v3 35/60] target/arm: Handle cpreg registration for missing EL, Richard Henderson, 2022/04/17
- Re: [PATCH v3 35/60] target/arm: Handle cpreg registration for missing EL,
Peter Maydell <=
- [PATCH v3 28/60] target/arm: Reorg ARMCPRegInfo type field bits, Richard Henderson, 2022/04/17
- [PATCH v3 30/60] target/arm: Name CPState type, Richard Henderson, 2022/04/17
- [PATCH v3 36/60] target/arm: Drop EL3 no EL2 fallbacks, Richard Henderson, 2022/04/17
- [PATCH v3 33/60] target/arm: Store cpregs key in the hash table directly, Richard Henderson, 2022/04/17