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Re: [PATCH v1 2/4] hw/arm: versal: Add the Cortex-R5Fs
From: |
Francisco Iglesias |
Subject: |
Re: [PATCH v1 2/4] hw/arm: versal: Add the Cortex-R5Fs |
Date: |
Thu, 7 Apr 2022 10:25:19 +0100 |
User-agent: |
NeoMutt/20170113 (1.7.2) |
On Wed, Apr 06, 2022 at 06:43:01PM +0100, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@amd.com>
>
> Add the Cortex-R5Fs of the Versal RPU (Real-time Processing Unit)
> subsystem.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
> ---
> hw/arm/xlnx-versal-virt.c | 6 +++---
> hw/arm/xlnx-versal.c | 36 ++++++++++++++++++++++++++++++++++++
> include/hw/arm/xlnx-versal.h | 10 ++++++++++
> 3 files changed, 49 insertions(+), 3 deletions(-)
>
> diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
> index 7c7baff8b7..66a2de7e13 100644
> --- a/hw/arm/xlnx-versal-virt.c
> +++ b/hw/arm/xlnx-versal-virt.c
> @@ -721,9 +721,9 @@ static void versal_virt_machine_class_init(ObjectClass
> *oc, void *data)
>
> mc->desc = "Xilinx Versal Virtual development board";
> mc->init = versal_virt_init;
> - mc->min_cpus = XLNX_VERSAL_NR_ACPUS;
> - mc->max_cpus = XLNX_VERSAL_NR_ACPUS;
> - mc->default_cpus = XLNX_VERSAL_NR_ACPUS;
> + mc->min_cpus = XLNX_VERSAL_NR_ACPUS + XLNX_VERSAL_NR_RCPUS;
> + mc->max_cpus = XLNX_VERSAL_NR_ACPUS + XLNX_VERSAL_NR_RCPUS;
> + mc->default_cpus = XLNX_VERSAL_NR_ACPUS + XLNX_VERSAL_NR_RCPUS;
> mc->no_cdrom = true;
> mc->default_ram_id = "ddr";
> }
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index 4415ee413f..ebad8dbb6d 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -25,6 +25,7 @@
> #include "hw/sysbus.h"
>
> #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72")
> +#define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f")
> #define GEM_REVISION 0x40070106
>
> #define VERSAL_NUM_PMC_APB_IRQS 3
> @@ -130,6 +131,35 @@ static void versal_create_apu_gic(Versal *s, qemu_irq
> *pic)
> }
> }
>
> +static void versal_create_rpu_cpus(Versal *s)
> +{
> + int i;
> +
> + object_initialize_child(OBJECT(s), "rpu-cluster", &s->lpd.rpu.cluster,
> + TYPE_CPU_CLUSTER);
> + qdev_prop_set_uint32(DEVICE(&s->lpd.rpu.cluster), "cluster-id", 1);
> +
> + for (i = 0; i < ARRAY_SIZE(s->lpd.rpu.cpu); i++) {
> + Object *obj;
> +
> + object_initialize_child(OBJECT(&s->lpd.rpu.cluster),
> + "rpu-cpu[*]", &s->lpd.rpu.cpu[i],
> + XLNX_VERSAL_RCPU_TYPE);
> + obj = OBJECT(&s->lpd.rpu.cpu[i]);
> + object_property_set_bool(obj, "start-powered-off", true,
> + &error_abort);
> +
> + object_property_set_int(obj, "mp-affinity", 0x100 | i, &error_abort);
> + object_property_set_int(obj, "core-count",
> ARRAY_SIZE(s->lpd.rpu.cpu),
> + &error_abort);
> + object_property_set_link(obj, "memory", OBJECT(&s->lpd.rpu.mr),
> + &error_abort);
> + qdev_realize(DEVICE(obj), NULL, &error_fatal);
> + }
> +
> + qdev_realize(DEVICE(&s->lpd.rpu.cluster), NULL, &error_fatal);
> +}
> +
> static void versal_create_uarts(Versal *s, qemu_irq *pic)
> {
> int i;
> @@ -638,6 +668,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
>
> versal_create_apu_cpus(s);
> versal_create_apu_gic(s, pic);
> + versal_create_rpu_cpus(s);
> versal_create_uarts(s, pic);
> versal_create_usbs(s, pic);
> versal_create_gems(s, pic);
> @@ -659,6 +690,8 @@ static void versal_realize(DeviceState *dev, Error **errp)
>
> memory_region_add_subregion_overlap(&s->mr_ps, MM_OCM, &s->lpd.mr_ocm,
> 0);
> memory_region_add_subregion_overlap(&s->fpd.apu.mr, 0, &s->mr_ps, 0);
> + memory_region_add_subregion_overlap(&s->lpd.rpu.mr, 0,
> + &s->lpd.rpu.mr_ps_alias, 0);
> }
>
> static void versal_init(Object *obj)
> @@ -666,7 +699,10 @@ static void versal_init(Object *obj)
> Versal *s = XLNX_VERSAL(obj);
>
> memory_region_init(&s->fpd.apu.mr, obj, "mr-apu", UINT64_MAX);
> + memory_region_init(&s->lpd.rpu.mr, obj, "mr-rpu", UINT64_MAX);
> memory_region_init(&s->mr_ps, obj, "mr-ps-switch", UINT64_MAX);
> + memory_region_init_alias(&s->lpd.rpu.mr_ps_alias, OBJECT(s),
> + "mr-rpu-ps-alias", &s->mr_ps, 0, UINT64_MAX);
> }
>
> static Property versal_properties[] = {
> diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
> index d2d3028e18..155e8c4b8c 100644
> --- a/include/hw/arm/xlnx-versal.h
> +++ b/include/hw/arm/xlnx-versal.h
> @@ -35,6 +35,7 @@
> OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL)
>
> #define XLNX_VERSAL_NR_ACPUS 2
> +#define XLNX_VERSAL_NR_RCPUS 2
> #define XLNX_VERSAL_NR_UARTS 2
> #define XLNX_VERSAL_NR_GEMS 2
> #define XLNX_VERSAL_NR_ADMAS 8
> @@ -73,6 +74,15 @@ struct Versal {
> VersalUsb2 usb;
> } iou;
>
> + /* Real-time Processing Unit. */
> + struct {
> + MemoryRegion mr;
> + MemoryRegion mr_ps_alias;
> +
> + CPUClusterState cluster;
> + ARMCPU cpu[XLNX_VERSAL_NR_RCPUS];
> + } rpu;
> +
> struct {
> qemu_or_irq irq_orgate;
> XlnxXramCtrl ctrl[XLNX_VERSAL_NR_XRAM];
> --
> 2.25.1
>
- [PATCH v1 0/4] hw/arm: versal: Add Cortex-R5s and CRL, Edgar E. Iglesias, 2022/04/06
- [PATCH v1 3/4] hw/misc: Add a model of the Xilinx Versal CRL, Edgar E. Iglesias, 2022/04/06
- [PATCH v1 1/4] hw/arm: versal: Create an APU CPU Cluster, Edgar E. Iglesias, 2022/04/06
- [PATCH v1 2/4] hw/arm: versal: Add the Cortex-R5Fs, Edgar E. Iglesias, 2022/04/06
- [PATCH v1 4/4] hw/arm: versal: Connect the CRL, Edgar E. Iglesias, 2022/04/06
- Re: [PATCH v1 0/4] hw/arm: versal: Add Cortex-R5s and CRL, Peter Maydell, 2022/04/11