-static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode)
+static void do_hash_operation(AspeedHACEState *s, int algo, bool sg_mode,
+ bool acc_mode)
{
struct iovec iov[ASPEED_HACE_MAX_SG];
g_autofree uint8_t *digest_buf;
@@ -103,6 +106,7 @@ static void do_hash_operation(AspeedHACEState *s, int algo,
bool sg_mode)
if (sg_mode) {
uint32_t len = 0;
+ uint32_t total_len = 0;
for (i = 0; !(len & SG_LIST_LEN_LAST); i++) {
uint32_t addr, src;
@@ -123,10 +127,26 @@ static void do_hash_operation(AspeedHACEState *s, int
algo, bool sg_mode)
MEMTXATTRS_UNSPECIFIED, NULL);
addr &= SG_LIST_ADDR_MASK;
- iov[i].iov_len = len & SG_LIST_LEN_MASK;
- plen = iov[i].iov_len;
+ plen = len & SG_LIST_LEN_MASK;
iov[i].iov_base = address_space_map(&s->dram_as, addr, &plen,
false,
MEMTXATTRS_UNSPECIFIED);
+
+ if (acc_mode) {
+ total_len += plen;
+
+ if (len & SG_LIST_LEN_LAST) {
+ /*
+ * In the padding message, the last 64/128 bit represents
+ * the total length of bitstream in big endian.
+ * SHA-224, SHA-256 are 64 bit
+ * SHA-384, SHA-512, SHA-512/224, SHA-512/256 are 128 bit
+ * However, we would not process such a huge bit stream.