[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 2/2] hw/arm: Add PCI mailbox module to Nuvoton SoC
From: |
Patrick Venture |
Subject: |
[PATCH 2/2] hw/arm: Add PCI mailbox module to Nuvoton SoC |
Date: |
Mon, 10 Jan 2022 09:56:07 -0800 |
From: Hao Wu <wuhaotsh@google.com>
This patch wires the PCI mailbox module to Nuvoton SoC.
Reviewed-by: Patrick Venture <venture@google.com>
Reviewed-by: Joe Komlodi <komlodi@google.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
---
docs/system/arm/nuvoton.rst | 1 +
hw/arm/npcm7xx.c | 15 ++++++++++++++-
include/hw/arm/npcm7xx.h | 2 ++
3 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/docs/system/arm/nuvoton.rst b/docs/system/arm/nuvoton.rst
index adf497e679..706c6f61c1 100644
--- a/docs/system/arm/nuvoton.rst
+++ b/docs/system/arm/nuvoton.rst
@@ -48,6 +48,7 @@ Supported devices
* SMBus controller (SMBF)
* Ethernet controller (EMC)
* Tachometer
+ * PCI Mailbox
Missing devices
---------------
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index 878c2208e0..ef8c9129ca 100644
--- a/hw/arm/npcm7xx.c
+++ b/hw/arm/npcm7xx.c
@@ -53,6 +53,9 @@
/* ADC Module */
#define NPCM7XX_ADC_BA (0xf000c000)
+/* PCI Mailbox Module */
+#define NPCM7XX_PCI_MBOX_BA (0xf0848000)
+
/* Internal AHB SRAM */
#define NPCM7XX_RAM3_BA (0xc0008000)
#define NPCM7XX_RAM3_SZ (4 * KiB)
@@ -83,6 +86,7 @@ enum NPCM7xxInterrupt {
NPCM7XX_UART1_IRQ,
NPCM7XX_UART2_IRQ,
NPCM7XX_UART3_IRQ,
+ NPCM7XX_PCI_MBOX_IRQ = 8,
NPCM7XX_EMC1RX_IRQ = 15,
NPCM7XX_EMC1TX_IRQ,
NPCM7XX_MMC_IRQ = 26,
@@ -447,6 +451,8 @@ static void npcm7xx_init(Object *obj)
object_initialize_child(obj, "emc[*]", &s->emc[i], TYPE_NPCM7XX_EMC);
}
+ object_initialize_child(obj, "pci-mbox", &s->pci_mbox,
+ TYPE_NPCM7XX_PCI_MBOX);
object_initialize_child(obj, "mmc", &s->mmc, TYPE_NPCM7XX_SDHCI);
}
@@ -697,6 +703,14 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
}
}
+ /* PCI Mailbox. Cannot fail */
+ sysbus_realize(SYS_BUS_DEVICE(&s->pci_mbox), &error_abort);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->pci_mbox), 0, NPCM7XX_PCI_MBOX_BA);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->pci_mbox), 1,
+ NPCM7XX_PCI_MBOX_BA + NPCM7XX_PCI_MBOX_RAM_SIZE);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->pci_mbox), 0,
+ npcm7xx_irq(s, NPCM7XX_PCI_MBOX_IRQ));
+
/* RAM2 (SRAM) */
memory_region_init_ram(&s->sram, OBJECT(dev), "ram2",
NPCM7XX_RAM2_SZ, &error_abort);
@@ -747,7 +761,6 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
create_unimplemented_device("npcm7xx.usbd[8]", 0xf0838000, 4 * KiB);
create_unimplemented_device("npcm7xx.usbd[9]", 0xf0839000, 4 * KiB);
create_unimplemented_device("npcm7xx.sd", 0xf0840000, 8 * KiB);
- create_unimplemented_device("npcm7xx.pcimbx", 0xf0848000, 512 * KiB);
create_unimplemented_device("npcm7xx.aes", 0xf0858000, 4 * KiB);
create_unimplemented_device("npcm7xx.des", 0xf0859000, 4 * KiB);
create_unimplemented_device("npcm7xx.sha", 0xf085a000, 4 * KiB);
diff --git a/include/hw/arm/npcm7xx.h b/include/hw/arm/npcm7xx.h
index ce593235d9..0bc27a28d6 100644
--- a/include/hw/arm/npcm7xx.h
+++ b/include/hw/arm/npcm7xx.h
@@ -26,6 +26,7 @@
#include "hw/misc/npcm7xx_clk.h"
#include "hw/misc/npcm7xx_gcr.h"
#include "hw/misc/npcm7xx_mft.h"
+#include "hw/misc/npcm7xx_pci_mbox.h"
#include "hw/misc/npcm7xx_pwm.h"
#include "hw/misc/npcm7xx_rng.h"
#include "hw/net/npcm7xx_emc.h"
@@ -104,6 +105,7 @@ typedef struct NPCM7xxState {
OHCISysBusState ohci;
NPCM7xxFIUState fiu[2];
NPCM7xxEMCState emc[2];
+ NPCM7xxPCIMBoxState pci_mbox;
NPCM7xxSDHCIState mmc;
} NPCM7xxState;
--
2.34.1.575.g55b058a8bb-goog