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Re: DSB does not seem to wait for TLBI completion

From: Idan Horowitz
Subject: Re: DSB does not seem to wait for TLBI completion
Date: Wed, 29 Dec 2021 15:23:46 +0200

Alex Bennée <alex.bennee@linaro.org> wrote:
> That's is weird because icount basically ensures round robin scheduling
> of each vCPU in turn. I wonder if there is a pending flush when the vCPU
> switches?
> We really need a reliable reproducer for this to investigate further.

I have finally been able to find the source of the issue, it was an
extremely subtle race condition in my code, so not an issue in QEMU
(although I did find a translation-related issue in QEMU during the
investigation: https://gitlab.com/qemu-project/qemu/-/issues/790), the
issue was so subtle in fact, that not even hardware was able to
reproduce it, only QEMU's highly deterministic icount mode was able to
reliably reproduce it. So thanks for your help, and sorry for wasting
your time.

> --
> Alex Bennée

Idan Horowitz

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