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[RFC PATCH v3 0/3] physmem: Have flaview API check bus permission from M


From: Philippe Mathieu-Daudé
Subject: [RFC PATCH v3 0/3] physmem: Have flaview API check bus permission from MemTxAttrs argument
Date: Wed, 15 Dec 2021 19:24:18 +0100

This series aim to kill a recent class of bug, the infamous
"DMA reentrancy" issues found by Alexander while fuzzing.

Introduce the 'memory' field in MemTxAttrs, allowing to restrict
a controller to memories (and not devices).

If a transaction permission is not allowed (for example access
to device), we return the specific MEMTX_BUS_ERROR.

Permissions are checked in after the flatview is resolved, and
before the access is done, in a new function: flatview_access_allowed().

Since v2 [1]:
- Addressed review comments:
  - reword arm_gicv3 description (pm215)
  - merged patches 3/4/5 (peterx & dhildenb)
  - simplify flatview_access_allowed() logic (stefanha)
  - drop MEMTXPERM enum and reword following AMBA terminology (edgar)

Since v1 ("hw: Forbid DMA write accesses to MMIO regions") [2]:
- rewrite based on Peter / Stefan feedbacks

Based on "hw: Let the DMA API take a MemTxAttrs argument" [3].

Based-on: <20210702092439.989969-1-philmd@redhat.com>

[1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg831168.html
[2] https://www.mail-archive.com/qemu-block@nongnu.org/msg72924.html
[3] https://www.mail-archive.com/qemu-devel@nongnu.org/msg820359.html

Philippe Mathieu-Daudé (3):
  hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERROR
  softmmu/physmem: Simplify flatview_write and
    address_space_access_valid
  softmmu/physmem: Introduce MemTxAttrs::memory field and
    MEMTX_BUS_ERROR

 include/exec/memattrs.h    |  9 +++++++
 hw/intc/arm_gicv3_redist.c |  4 +--
 softmmu/physmem.c          | 54 +++++++++++++++++++++++++++++++-------
 3 files changed, 55 insertions(+), 12 deletions(-)

-- 
2.33.1





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