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Re: [PATCH v5 3/3] tests/arm-cpu-features: Add A64FX processor related


From: Andrew Jones
Subject: Re: [PATCH v5 3/3] tests/arm-cpu-features: Add A64FX processor related
Date: Mon, 30 Aug 2021 10:41:07 +0200

On Mon, Aug 30, 2021 at 05:28:20PM +0900, Shuuichirou Ishii wrote:

nit: A commit message would be nice, even if it's just a simple
sentence expanding on the summary.

> Signed-off-by: Shuuichirou Ishii <ishii.shuuichir@fujitsu.com>
> ---
>  tests/qtest/arm-cpu-features.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c
> index 8252b85bb8..90a87f0ea9 100644
> --- a/tests/qtest/arm-cpu-features.c
> +++ b/tests/qtest/arm-cpu-features.c
> @@ -473,6 +473,19 @@ static void test_query_cpu_model_expansion(const void 
> *data)
>          assert_has_feature_enabled(qts, "cortex-a57", "pmu");
>          assert_has_feature_enabled(qts, "cortex-a57", "aarch64");
>  
> +        assert_has_feature_enabled(qts, "a64fx", "pmu");
> +        assert_has_feature_enabled(qts, "a64fx", "aarch64");
> +        /*
> +         * A64FX does not support any other vector lengths besides those
> +         * that are enabled by default(128bit, 256bits, 512bit).
> +         */
> +        assert_has_feature_enabled(qts, "a64fx", "sve");
> +        assert_sve_vls(qts, "a64fx", 0xb, NULL);
> +        assert_error(qts, "a64fx", "cannot enable sve384",
> +                     "{ 'sve384': true }");
> +        assert_error(qts, "a64fx", "cannot enable sve640",
> +                     "{ 'sve640': true }");
> +
>          sve_tests_default(qts, "max");
>          pauth_tests_default(qts, "max");
>  
> -- 
> 2.27.0
>

Reviewed-by: Andrew Jones <drjones@redhat.com>




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