[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v5 4/9] hw/i386: Add a default_bus_bypass_iommu pc machine option
From: |
Wang Xingang |
Subject: |
[PATCH v5 4/9] hw/i386: Add a default_bus_bypass_iommu pc machine option |
Date: |
Thu, 8 Jul 2021 12:55:14 +0000 |
From: Xingang Wang <wangxingang5@huawei.com>
Add a default_bus_bypass_iommu pc machine option to enable/disable
bypass_iommu for default root bus. The option is disabled by default
and can be enabled with:
$QEMU -machine q35,default_bus_bypass_iommu=true
Signed-off-by: Xingang Wang <wangxingang5@huawei.com>
---
hw/i386/pc.c | 20 ++++++++++++++++++++
hw/pci-host/q35.c | 2 ++
include/hw/i386/pc.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 8e1220db72..257d70f6e9 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1522,6 +1522,21 @@ static void pc_machine_set_hpet(Object *obj, bool value,
Error **errp)
pcms->hpet_enabled = value;
}
+static bool pc_machine_get_default_bus_bypass_iommu(Object *obj, Error **errp)
+{
+ PCMachineState *pcms = PC_MACHINE(obj);
+
+ return pcms->default_bus_bypass_iommu;
+}
+
+static void pc_machine_set_default_bus_bypass_iommu(Object *obj, bool value,
+ Error **errp)
+{
+ PCMachineState *pcms = PC_MACHINE(obj);
+
+ pcms->default_bus_bypass_iommu = value;
+}
+
static void pc_machine_get_max_ram_below_4g(Object *obj, Visitor *v,
const char *name, void *opaque,
Error **errp)
@@ -1621,6 +1636,7 @@ static void pc_machine_initfn(Object *obj)
#ifdef CONFIG_HPET
pcms->hpet_enabled = true;
#endif
+ pcms->default_bus_bypass_iommu = false;
pc_system_flash_create(pcms);
pcms->pcspk = isa_new(TYPE_PC_SPEAKER);
@@ -1745,6 +1761,10 @@ static void pc_machine_class_init(ObjectClass *oc, void
*data)
object_class_property_add_bool(oc, "hpet",
pc_machine_get_hpet, pc_machine_set_hpet);
+ object_class_property_add_bool(oc, "default_bus_bypass_iommu",
+ pc_machine_get_default_bus_bypass_iommu,
+ pc_machine_set_default_bus_bypass_iommu);
+
object_class_property_add(oc, PC_MACHINE_MAX_FW_SIZE, "size",
pc_machine_get_max_fw_size, pc_machine_set_max_fw_size,
NULL, NULL);
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 2eb729dff5..826a05d7f3 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -64,6 +64,8 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
s->mch.address_space_io,
0, TYPE_PCIE_BUS);
PC_MACHINE(qdev_get_machine())->bus = pci->bus;
+ pci->bypass_iommu =
+ PC_MACHINE(qdev_get_machine())->default_bus_bypass_iommu;
qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal);
}
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 87294f2632..fd741119fa 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -44,6 +44,7 @@ typedef struct PCMachineState {
bool sata_enabled;
bool pit_enabled;
bool hpet_enabled;
+ bool default_bus_bypass_iommu;
uint64_t max_fw_size;
/* NUMA information: */
--
2.19.1
- [PATCH v5 0/9] IOMMU: Add support for IOMMU Bypass Feature, Wang Xingang, 2021/07/08
- [PATCH v5 7/9] hw/i386/acpi-build: Add DMAR support to bypass iommu, Wang Xingang, 2021/07/08
- [PATCH v5 6/9] hw/arm/virt-acpi-build: Add IORT support to bypass SMMUv3, Wang Xingang, 2021/07/08
- [PATCH v5 8/9] hw/i386/acpi-build: Add IVRS support to bypass iommu, Wang Xingang, 2021/07/08
- [PATCH v5 2/9] hw/pxb: Add a bypass iommu property, Wang Xingang, 2021/07/08
- [PATCH v5 9/9] docs: Add documentation for iommu bypass, Wang Xingang, 2021/07/08
- [PATCH v5 5/9] hw/pci: Add pci_bus_range() to get PCI bus number range, Wang Xingang, 2021/07/08
- [PATCH v5 1/9] hw/pci/pci_host: Allow PCI host to bypass iommu, Wang Xingang, 2021/07/08
- [PATCH v5 3/9] hw/arm/virt: Add default_bus_bypass_iommu machine option, Wang Xingang, 2021/07/08
- [PATCH v5 4/9] hw/i386: Add a default_bus_bypass_iommu pc machine option,
Wang Xingang <=