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Re: [PATCH v5 04/10] hw/intc: GICv3 ITS Command processing


From: Eric Auger
Subject: Re: [PATCH v5 04/10] hw/intc: GICv3 ITS Command processing
Date: Tue, 6 Jul 2021 11:27:23 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1

Hi,

On 7/5/21 4:07 PM, Peter Maydell wrote:
> On Wed, 30 Jun 2021 at 16:32, Shashi Mallela <shashi.mallela@linaro.org> 
> wrote:
>>
>> Added ITS command queue handling for MAPTI,MAPI commands,handled ITS
>> translation which triggers an LPI via INT command as well as write
>> to GITS_TRANSLATER register,defined enum to differentiate between ITS
>> command interrupt trigger and GITS_TRANSLATER based interrupt trigger.
>> Each of these commands make use of other functionalities implemented to
>> get device table entry,collection table entry or interrupt translation
>> table entry required for their processing.
>>
>> Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
>> ---
>>  hw/intc/arm_gicv3_its.c            | 361 ++++++++++++++++++++++++++++-
>>  hw/intc/gicv3_internal.h           |  26 +++
>>  include/hw/intc/arm_gicv3_common.h |   2 +
>>  3 files changed, 388 insertions(+), 1 deletion(-)
> 
>> +/*
>> + * This function handles the processing of following commands based on
>> + * the ItsCmdType parameter passed:-
>> + * 1. trigerring of lpi interrupt translation via ITS INT command
>> + * 2. trigerring of lpi interrupt translation via gits_translater register
>> + * 3. handling of ITS CLEAR command
>> + * 4. handling of ITS DISCARD command
>> + */
> 
> "triggering"
> 
>>  #define DEVID_SHIFT                  32
>>  #define DEVID_MASK                MAKE_64BIT_MASK(32, 32)
> 
>> @@ -347,6 +368,11 @@ FIELD(MAPC, RDBASE, 16, 32)
>>   * vPEID = 16 bits
>>   */
>>  #define ITS_ITT_ENTRY_SIZE            0xC
>> +#define ITE_ENTRY_INTTYPE_SHIFT        1
>> +#define ITE_ENTRY_INTID_SHIFT          2
>> +#define ITE_ENTRY_INTID_MASK         ((1ULL << 24) - 1)
>> +#define ITE_ENTRY_INTSP_SHIFT          26
>> +#define ITE_ENTRY_ICID_MASK          ((1ULL << 16) - 1)
> 
> This is still using a MASK value that's at the bottom of the
> integer, not in its shifted location.
There are other locations, pointed out by former comments, where this
kind of unusual masking scheme is used but well...

Thanks

Eric

> 
> Otherwise
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> 
> thanks
> -- PMM
> 




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