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[PATCH v16 44/99] target/arm: fixup sve_exception_el code style before m
From: |
Alex Bennée |
Subject: |
[PATCH v16 44/99] target/arm: fixup sve_exception_el code style before move |
Date: |
Fri, 4 Jun 2021 16:52:17 +0100 |
From: Claudio Fontana <cfontana@suse.de>
before moving over sve_exception_el from the helper code,
cleanup the style.
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
target/arm/tcg/helper.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/arm/tcg/helper.c b/target/arm/tcg/helper.c
index 9dd83911f2..1c69a69d5a 100644
--- a/target/arm/tcg/helper.c
+++ b/target/arm/tcg/helper.c
@@ -261,7 +261,8 @@ static int arm_gdb_set_svereg(CPUARMState *env, uint8_t
*buf, int reg)
}
#endif /* TARGET_AARCH64 */
-/* Return the exception level to which exceptions should be taken
+/*
+ * Return the exception level to which exceptions should be taken
* via SVEAccessTrap. If an exception should be routed through
* AArch64.AdvSIMDFPAccessTrap, return 0; fp_exception_el should
* take care of raising that exception.
@@ -275,7 +276,8 @@ int sve_exception_el(CPUARMState *env, int el)
if (el <= 1 && (hcr_el2 & (HCR_E2H | HCR_TGE)) != (HCR_E2H | HCR_TGE)) {
bool disabled = false;
- /* The CPACR.ZEN controls traps to EL1:
+ /*
+ * The CPACR.ZEN controls traps to EL1:
* 0, 2 : trap EL0 and EL1 accesses
* 1 : trap only EL0 accesses
* 3 : trap no accesses
@@ -301,7 +303,8 @@ int sve_exception_el(CPUARMState *env, int el)
}
}
- /* CPTR_EL2. Since TZ and TFP are positive,
+ /*
+ * CPTR_EL2. Since TZ and TFP are positive,
* they will be zero when EL2 is not present.
*/
if (el <= 2 && arm_is_el2_enabled(env)) {
--
2.20.1
- [PATCH v16 75/99] target/arm: make is_aa64 and arm_el_is_aa64 a macro for !TARGET_AARCH64, (continued)
- [PATCH v16 75/99] target/arm: make is_aa64 and arm_el_is_aa64 a macro for !TARGET_AARCH64, Alex Bennée, 2021/06/04
- [PATCH v16 80/99] target/arm: tcg-sve: import narrow_vq and change_el functions, Alex Bennée, 2021/06/04
- [PATCH v16 97/99] tests/qtest: make xlnx-can-test conditional on being configured, Alex Bennée, 2021/06/04
- [PATCH v16 29/99] target/arm: move cpu definitions to common cpu module, Alex Bennée, 2021/06/04
- [PATCH v16 19/99] target/arm: tcg: split mte_helper user-only and sysemu code, Alex Bennée, 2021/06/04
- [PATCH v16 21/99] target/arm: tcg: split tlb_helper user-only and sysemu-only parts, Alex Bennée, 2021/06/04
- [PATCH v16 35/99] target/arm: split vfp state setting from tcg helpers, Alex Bennée, 2021/06/04
- [PATCH v16 44/99] target/arm: fixup sve_exception_el code style before move,
Alex Bennée <=
- [PATCH v16 88/99] target/arm: cpu64: rename arm_cpu_finalize_features, Alex Bennée, 2021/06/04
- [PATCH v16 61/99] target/arm: remove broad "else" statements when checking accels, Alex Bennée, 2021/06/04
- [PATCH v16 93/99] meson: Introduce target-specific Kconfig, Alex Bennée, 2021/06/04
- [PATCH v16 62/99] target/arm: remove kvm-stub.c, Alex Bennée, 2021/06/04
- [PATCH v16 79/99] target/arm: tcg: restrict ZCR cpregs to TARGET_AARCH64, Alex Bennée, 2021/06/04