Re: [PATCH v6 55/82] target/arm: Implement SVE2 saturating multiply-add (indexed)

[Peter Maydell]

On Fri, 30 Apr 2021 at 22:07, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/arm/helper-sve.h    |  9 +++++++++
>  target/arm/sve.decode      | 18 ++++++++++++++++++
>  target/arm/sve_helper.c    | 30 ++++++++++++++++++++++++++++++
>  target/arm/translate-sve.c | 32 ++++++++++++++++++++++++--------
>  4 files changed, 81 insertions(+), 8 deletions(-)
>
> +#define DO_ZZXW(NAME, TYPEW, TYPEN, HW, HN, OP) \
> +void HELPER(NAME)(void *vd, void *vn, void *vm, void *va, uint32_t desc)  \
> +{                                                                         \
> +    intptr_t i, j, oprsz = simd_oprsz(desc);                              \
> +    intptr_t sel = extract32(desc, SIMD_DATA_SHIFT, 1) * sizeof(TYPEN);   \
> +    intptr_t idx = extract32(desc, SIMD_DATA_SHIFT + 1, 3) * sizeof(TYPEN); \
> +    for (i = 0; i < oprsz; i += 16) {                                     \
> +        TYPEW mm = *(TYPEN *)(vm + i + idx);                              \

Doesn't this need an H macro ?

> +        for (j = 0; j < 16; j += sizeof(TYPEW)) {                         \
> +            TYPEW nn = *(TYPEN *)(vn + HN(i + j + sel));                  \
> +            TYPEW aa = *(TYPEW *)(va + HW(i + j));                        \
> +            *(TYPEW *)(vd + HW(i + j)) = OP(nn, mm, aa);                  \
> +        }                                                                 \
> +    }                                                                     \
> +}

Otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM