Re: [PATCH v6 01/82] target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2

[Richard Henderson]

On 5/11/21 2:55 AM, Peter Maydell wrote:
> This code is earlier in the function than the place where we
> update ahcf->isar to set the "SVE supported bits":
>
>      /* Add feature bits that can't appear until after VCPU init. */
>      if (sve_supported) {
>          t = ahcf->isar.id_aa64pfr0;
>          t = FIELD_DP64(t, ID_AA64PFR0, SVE, 1);
>          ahcf->isar.id_aa64pfr0 = t;
>      }
>
> so won't the condition here be always false ?

Good catch, thanks.
I guess I can test this running kvm inside tcg.


r~