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[PATCH v5 11/15] cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v5 11/15] cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps |
Date: |
Thu, 22 Apr 2021 12:47:00 +0200 |
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/core/cpu.h | 3 ---
include/hw/core/sysemu-cpu-ops.h | 5 +++++
hw/core/cpu.c | 4 ++--
target/arm/cpu.c | 2 +-
target/i386/cpu.c | 2 +-
5 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index b7095bc4192..28c4fc541a2 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -108,8 +108,6 @@ struct AccelCPUClass;
* associated memory transaction attributes to use for the access.
* CPUs which use memory transaction attributes should implement this
* instead of get_phys_page_debug.
- * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for
- * a memory access with the specified memory transaction attributes.
* @gdb_read_register: Callback for letting GDB read a register.
* @gdb_write_register: Callback for letting GDB write a register.
* @gdb_num_core_regs: Number of core registers accessible to GDB.
@@ -151,7 +149,6 @@ struct CPUClass {
hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
hwaddr (*get_phys_page_attrs_debug)(CPUState *cpu, vaddr addr,
MemTxAttrs *attrs);
- int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs);
int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-ops.h
index 60c667801ef..3c3f211136d 100644
--- a/include/hw/core/sysemu-cpu-ops.h
+++ b/include/hw/core/sysemu-cpu-ops.h
@@ -16,6 +16,11 @@
* struct SysemuCPUOps: System operations specific to a CPU class
*/
typedef struct SysemuCPUOps {
+ /**
+ * @asidx_from_attrs: Callback to return the CPU AddressSpace to use for
+ * a memory access with the specified memory transaction attributes.
+ */
+ int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs);
/**
* @get_crash_info: Callback for reporting guest crash information in
* GUEST_PANICKED events.
diff --git a/hw/core/cpu.c b/hw/core/cpu.c
index c74390aafbf..c44229205ff 100644
--- a/hw/core/cpu.c
+++ b/hw/core/cpu.c
@@ -116,8 +116,8 @@ int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
CPUClass *cc = CPU_GET_CLASS(cpu);
int ret = 0;
- if (cc->asidx_from_attrs) {
- ret = cc->asidx_from_attrs(cpu, attrs);
+ if (cc->sysemu_ops->asidx_from_attrs) {
+ ret = cc->sysemu_ops->asidx_from_attrs(cpu, attrs);
assert(ret < cpu->num_ases && ret >= 0);
}
return ret;
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 326ed9180cc..ff356094b13 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1945,6 +1945,7 @@ static gchar *arm_gdb_arch_name(CPUState *cs)
#ifndef CONFIG_USER_ONLY
static const struct SysemuCPUOps arm_sysemu_ops = {
+ .asidx_from_attrs = arm_asidx_from_attrs,
.write_elf32_note = arm_cpu_write_elf32_note,
.write_elf64_note = arm_cpu_write_elf64_note,
.virtio_is_big_endian = arm_cpu_virtio_is_big_endian,
@@ -1990,7 +1991,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void
*data)
cc->gdb_write_register = arm_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug;
- cc->asidx_from_attrs = arm_asidx_from_attrs;
cc->sysemu_ops = &arm_sysemu_ops;
#endif
cc->gdb_num_core_regs = 26;
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 4ee64461b43..5269fa484e1 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -7393,6 +7393,7 @@ static Property x86_cpu_properties[] = {
#ifndef CONFIG_USER_ONLY
static const struct SysemuCPUOps i386_sysemu_ops = {
+ .asidx_from_attrs = x86_asidx_from_attrs,
.get_crash_info = x86_cpu_get_crash_info,
.write_elf32_note = x86_cpu_write_elf32_note,
.write_elf64_note = x86_cpu_write_elf64_note,
@@ -7434,7 +7435,6 @@ static void x86_cpu_common_class_init(ObjectClass *oc,
void *data)
cc->get_paging_enabled = x86_cpu_get_paging_enabled;
#ifndef CONFIG_USER_ONLY
- cc->asidx_from_attrs = x86_asidx_from_attrs;
cc->get_memory_mapping = x86_cpu_get_memory_mapping;
cc->get_phys_page_attrs_debug = x86_cpu_get_phys_page_attrs_debug;
cc->sysemu_ops = &i386_sysemu_ops;
--
2.26.3
- [PATCH v5 02/15] cpu: Introduce cpu_virtio_is_big_endian(), (continued)
- [PATCH v5 02/15] cpu: Introduce cpu_virtio_is_big_endian(), Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v5 03/15] cpu: Directly use cpu_write_elf*() fallback handlers in place, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v5 04/15] cpu: Directly use get_paging_enabled() fallback handlers in place, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v5 05/15] cpu: Directly use get_memory_mapping() fallback handlers in place, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v5 06/15] cpu: Introduce SysemuCPUOps structure, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v5 07/15] cpu: Move CPUClass::vmsd to SysemuCPUOps, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v5 08/15] cpu: Move CPUClass::virtio_is_big_endian to SysemuCPUOps, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v5 09/15] cpu: Move CPUClass::get_crash_info to SysemuCPUOps, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v5 10/15] cpu: Move CPUClass::write_elf* to SysemuCPUOps, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v5 11/15] cpu: Move CPUClass::asidx_from_attrs to SysemuCPUOps,
Philippe Mathieu-Daudé <=
- [PATCH v5 12/15] cpu: Move CPUClass::get_phys_page_debug to SysemuCPUOps, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v5 13/15] cpu: Move CPUClass::get_memory_mapping to SysemuCPUOps, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v5 14/15] cpu: Move CPUClass::get_paging_enabled to SysemuCPUOps, Philippe Mathieu-Daudé, 2021/04/22
- [PATCH v5 15/15] cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c, Philippe Mathieu-Daudé, 2021/04/22