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[PATCH RFC v3 4/8] hw/i386: Add a pc machine option to bypass iommu for
From: |
Wang Xingang |
Subject: |
[PATCH RFC v3 4/8] hw/i386: Add a pc machine option to bypass iommu for primary bus |
Date: |
Wed, 21 Apr 2021 08:04:59 +0000 |
From: Xingang Wang <wangxingang5@huawei.com>
Add a bypass_iommu pc machine option to bypass iommu translation
for the primary root bus.
The option can be used as manner:
qemu-system-x86_64 -machine q35,bypass_iommu=true
Signed-off-by: Xingang Wang <wangxingang5@huawei.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
---
hw/i386/pc.c | 18 ++++++++++++++++++
hw/pci-host/q35.c | 1 +
include/hw/i386/pc.h | 1 +
3 files changed, 20 insertions(+)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 8a84b25a03..2266a0520f 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1529,6 +1529,20 @@ static void pc_machine_set_hpet(Object *obj, bool value,
Error **errp)
pcms->hpet_enabled = value;
}
+static bool pc_machine_get_bypass_iommu(Object *obj, Error **errp)
+{
+ PCMachineState *pcms = PC_MACHINE(obj);
+
+ return pcms->bypass_iommu;
+}
+
+static void pc_machine_set_bypass_iommu(Object *obj, bool value, Error **errp)
+{
+ PCMachineState *pcms = PC_MACHINE(obj);
+
+ pcms->bypass_iommu = value;
+}
+
static void pc_machine_get_max_ram_below_4g(Object *obj, Visitor *v,
const char *name, void *opaque,
Error **errp)
@@ -1628,6 +1642,7 @@ static void pc_machine_initfn(Object *obj)
#ifdef CONFIG_HPET
pcms->hpet_enabled = true;
#endif
+ pcms->bypass_iommu = false;
pc_system_flash_create(pcms);
pcms->pcspk = isa_new(TYPE_PC_SPEAKER);
@@ -1752,6 +1767,9 @@ static void pc_machine_class_init(ObjectClass *oc, void
*data)
object_class_property_add_bool(oc, "hpet",
pc_machine_get_hpet, pc_machine_set_hpet);
+ object_class_property_add_bool(oc, "bypass_iommu",
+ pc_machine_get_bypass_iommu, pc_machine_set_bypass_iommu);
+
object_class_property_add(oc, PC_MACHINE_MAX_FW_SIZE, "size",
pc_machine_get_max_fw_size, pc_machine_set_max_fw_size,
NULL, NULL);
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 2eb729dff5..ade05a5539 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -64,6 +64,7 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
s->mch.address_space_io,
0, TYPE_PCIE_BUS);
PC_MACHINE(qdev_get_machine())->bus = pci->bus;
+ pci->bypass_iommu = PC_MACHINE(qdev_get_machine())->bypass_iommu;
qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal);
}
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index dcf060b791..83ee8f2a01 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -45,6 +45,7 @@ typedef struct PCMachineState {
bool sata_enabled;
bool pit_enabled;
bool hpet_enabled;
+ bool bypass_iommu;
uint64_t max_fw_size;
/* NUMA information: */
--
2.19.1
- [PATCH RFC v3 0/8] Introduce Bypass IOMMU Feature, Wang Xingang, 2021/04/21
- [PATCH RFC v3 8/8] hw/i386/acpi-build: Add bypass_iommu check when building IVRS table, Wang Xingang, 2021/04/21
- [PATCH RFC v3 5/8] hw/pci: Add pci_bus_range to get bus number range, Wang Xingang, 2021/04/21
- [PATCH RFC v3 1/8] hw/pci/pci_host: Allow bypass iommu for pci host, Wang Xingang, 2021/04/21
- [PATCH RFC v3 6/8] hw/arm/virt-acpi-build: Add explicit IORT idmap for smmuv3 node, Wang Xingang, 2021/04/21
- [PATCH RFC v3 4/8] hw/i386: Add a pc machine option to bypass iommu for primary bus,
Wang Xingang <=
- [PATCH RFC v3 3/8] hw/arm/virt: Add a machine option to bypass iommu for primary bus, Wang Xingang, 2021/04/21
- [PATCH RFC v3 7/8] hw/i386/acpi-build: Add explicit scope in DMAR table, Wang Xingang, 2021/04/21
- [PATCH RFC v3 2/8] hw/pxb: Add a bypass iommu property, Wang Xingang, 2021/04/21