[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translatio
|
From: |
Max Filippov |
|
Subject: |
Re: [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation |
|
Date: |
Wed, 14 Apr 2021 18:23:56 -0700 |
On Wed, Apr 14, 2021 at 12:43 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 4/14/21 11:03 AM, Max Filippov wrote:
> > On Wed, Apr 14, 2021 at 9:51 AM Ilya Leoshkevich <iii@linux.ibm.com> wrote:
> >> On Wed, 2021-04-14 at 16:48 +0200, David Hildenbrand wrote:
> >>> Did you double-check the xtensa issue?
> >>
> >> Oh, I'm sorry, I completely forgot about that one. I just ran the
> >> test locally, and apparently it fails because of this new assert, so
> >> I'll have to write the 4th patch now. Thanks!
> >
> > Just curious, what xtensa issue?
>
> Returning from xtensa_tr_translate_insn with tb->size == 0.
>
> Basically, dc->base.pc_next needs to be incremented even for illegal
> instructions, preferably by the number of bytes consumed while determining
> that
> the insn is illegal.
I see a few places where target/xtensa may do that. E.g. it does that on entry
to an exception handler to allow for debugging its first instruction.
No guest code
is consumed to make this decision, would size 1 work in that case?
I'll take a look.
--
Thanks.
-- Max
- [PATCH v3 0/3] accel/tcg: Make sure that tb->size != 0 after translation, Ilya Leoshkevich, 2021/04/14
- [PATCH v3 2/3] target/arm: Make sure that commpage's tb->size != 0, Ilya Leoshkevich, 2021/04/14
- [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation, Ilya Leoshkevich, 2021/04/14
- Re: [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation, David Hildenbrand, 2021/04/14
- Re: [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation, Ilya Leoshkevich, 2021/04/14
- Re: [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation, Max Filippov, 2021/04/14
- Re: [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation, Richard Henderson, 2021/04/14
- Re: [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation,
Max Filippov <=
- Re: [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation, Ilya Leoshkevich, 2021/04/15
- Re: [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation, Richard Henderson, 2021/04/15
- Re: [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation, Peter Maydell, 2021/04/15
- Re: [PATCH v3 3/3] accel/tcg: Assert that tb->size != 0 after translation, Max Filippov, 2021/04/15
[PATCH v3 1/3] target/s390x: Fix translation exception on illegal instruction, Ilya Leoshkevich, 2021/04/14