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[PATCH 06/13] target/arm: Move vfp_{load, store}_reg{32, 64} to translat
From: |
Peter Maydell |
Subject: |
[PATCH 06/13] target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.inc |
Date: |
Tue, 13 Apr 2021 17:07:52 +0100 |
The functions vfp_load_reg32(), vfp_load_reg64(), vfp_store_reg32()
and vfp_store_reg64() are used only in translate-vfp.c.inc. Move
them to that file.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate.c | 20 --------------------
target/arm/translate-vfp.c.inc | 20 ++++++++++++++++++++
2 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index fd248b101f2..2daabb5fb6f 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1103,26 +1103,6 @@ static long vfp_reg_offset(bool dp, unsigned reg)
}
}
-static inline void vfp_load_reg64(TCGv_i64 var, int reg)
-{
- tcg_gen_ld_i64(var, cpu_env, vfp_reg_offset(true, reg));
-}
-
-static inline void vfp_store_reg64(TCGv_i64 var, int reg)
-{
- tcg_gen_st_i64(var, cpu_env, vfp_reg_offset(true, reg));
-}
-
-static inline void vfp_load_reg32(TCGv_i32 var, int reg)
-{
- tcg_gen_ld_i32(var, cpu_env, vfp_reg_offset(false, reg));
-}
-
-static inline void vfp_store_reg32(TCGv_i32 var, int reg)
-{
- tcg_gen_st_i32(var, cpu_env, vfp_reg_offset(false, reg));
-}
-
void read_neon_element32(TCGv_i32 dest, int reg, int ele, MemOp memop)
{
long off = neon_element_offset(reg, ele, memop);
diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc
index 16a730b7bdd..873a6237ea1 100644
--- a/target/arm/translate-vfp.c.inc
+++ b/target/arm/translate-vfp.c.inc
@@ -30,6 +30,26 @@
#include "decode-vfp.c.inc"
#include "decode-vfp-uncond.c.inc"
+static inline void vfp_load_reg64(TCGv_i64 var, int reg)
+{
+ tcg_gen_ld_i64(var, cpu_env, vfp_reg_offset(true, reg));
+}
+
+static inline void vfp_store_reg64(TCGv_i64 var, int reg)
+{
+ tcg_gen_st_i64(var, cpu_env, vfp_reg_offset(true, reg));
+}
+
+static inline void vfp_load_reg32(TCGv_i32 var, int reg)
+{
+ tcg_gen_ld_i32(var, cpu_env, vfp_reg_offset(false, reg));
+}
+
+static inline void vfp_store_reg32(TCGv_i32 var, int reg)
+{
+ tcg_gen_st_i32(var, cpu_env, vfp_reg_offset(false, reg));
+}
+
/*
* The imm8 encodes the sign bit, enough bits to represent an exponent in
* the range 01....1xx to 10....0xx, and the most significant 4 bits of
--
2.20.1
- Re: [PATCH 01/13] target/arm: Move constant expanders to translate.h, (continued)
- [PATCH 02/13] target/arm: Share unallocated_encoding() and gen_exception_insn(), Peter Maydell, 2021/04/13
- [PATCH 03/13] target/arm: Make functions used by m-nocp global, Peter Maydell, 2021/04/13
- [PATCH 05/13] target/arm: Move gen_aa32 functions to translate-a32.h, Peter Maydell, 2021/04/13
- [PATCH 04/13] target/arm: Split m-nocp trans functions into their own file, Peter Maydell, 2021/04/13
- [PATCH 06/13] target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.inc,
Peter Maydell <=
- [PATCH 07/13] target/arm: Make functions used by translate-vfp global, Peter Maydell, 2021/04/13
- [PATCH 10/13] target/arm: Delete unused typedef, Peter Maydell, 2021/04/13
- [PATCH 09/13] target/arm: Move vfp_reg_ptr() to translate-neon.c.inc, Peter Maydell, 2021/04/13