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Re: [PATCH] target/arm: Make number of counters in PMCR follow the CPU
From: |
Peter Maydell |
Subject: |
Re: [PATCH] target/arm: Make number of counters in PMCR follow the CPU |
Date: |
Wed, 31 Mar 2021 09:43:06 +0000 |
On Wed, 31 Mar 2021 at 09:59, Zenghui Yu <yuzenghui@huawei.com> wrote:
>
> [+kvmarm, Marc]
>
> On 2021/3/12 0:59, Peter Maydell wrote:
> > Currently we give all the v7-and-up CPUs a PMU with 4 counters. This
> > means that we don't provide the 6 counters that are required by the
> > Arm BSA (Base System Architecture) specification if the CPU supports
> > the Virtualization extensions.
> So I've tested it with kvm and I get the following error before
> VM startup:
>
> "qemu-system-aarch64: Failed to retrieve host CPU features"
>
> > ---
> > target/arm/cpu.h | 1 +
> > target/arm/cpu64.c | 3 +++
> > target/arm/cpu_tcg.c | 5 +++++
> > target/arm/helper.c | 29 +++++++++++++++++------------
> > target/arm/kvm64.c | 2 ++
> > 5 files changed, 28 insertions(+), 12 deletions(-)
>
> [...]
>
> > diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
> > index dff85f6db94..581335e49d3 100644
> > --- a/target/arm/kvm64.c
> > +++ b/target/arm/kvm64.c
> > @@ -566,6 +566,8 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures
> > *ahcf)
> > ARM64_SYS_REG(3, 0, 0, 7, 1));
> > err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr2,
> > ARM64_SYS_REG(3, 0, 0, 7, 2));
> > + err |= read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0,
> > + ARM64_SYS_REG(3, 3, 9, 12, 0));
>
> Looks like we tried to access PMCR_EL0 *before* telling kvm that
> KVM_ARM_VCPU_PMU_V3 feature should be supported, which is now
> refused by kvm [*].
>
> [*] https://git.kernel.org/torvalds/c/11663111cd49
Oops, that's embarrassing. I should have tested with KVM, and
I forgot the PMU needs special enablement :-(
I'm on holiday right now so I probably won't have time to
look at a fix for rc2. I might just revert this commit.
thanks
-- PMM