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RE: [RFC PATCH 6/7] cpu: Move CPUClass::has_work() to TCGCPUOps
From: |
Taylor Simpson |
Subject: |
RE: [RFC PATCH 6/7] cpu: Move CPUClass::has_work() to TCGCPUOps |
Date: |
Wed, 3 Mar 2021 23:03:29 +0000 |
> -----Original Message-----
> From: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> On
> Behalf Of Philippe Mathieu-Daudé
> Sent: Tuesday, March 2, 2021 4:28 AM
> To: qemu-devel@nongnu.org
> Cc: Yoshinori Sato <ysato@users.sourceforge.jp>; Chris Wulff
> <crwulff@gmail.com>; qemu-ppc@nongnu.org; Marcel Apfelbaum
> <marcel.apfelbaum@gmail.com>; Greg Kurz <groug@kaod.org>; qemu-
> riscv@nongnu.org; Richard Henderson <richard.henderson@linaro.org>;
> Peter Maydell <peter.maydell@linaro.org>; Michael Walle
> <michael@walle.cc>; Palmer Dabbelt <palmer@dabbelt.com>; Sarah Harris
> <S.E.Harris@kent.ac.uk>; Anthony Green <green@moxielogic.com>;
> Eduardo Habkost <ehabkost@redhat.com>; Bastian Koppelmann
> <kbastian@mail.uni-paderborn.de>; Laurent Vivier <laurent@vivier.eu>;
> Edgar E. Iglesias <edgar.iglesias@gmail.com>; Claudio Fontana
> <cfontana@suse.de>; Artyom Tarasenko <atar4qemu@gmail.com>; qemu-
> s390x@nongnu.org; Thomas Huth <thuth@redhat.com>; Paolo Bonzini
> <pbonzini@redhat.com>; Cornelia Huck <cohuck@redhat.com>; Taylor
> Simpson <tsimpson@quicinc.com>; Alistair Francis
> <Alistair.Francis@wdc.com>; Michael Rolnik <mrolnik@gmail.com>; David
> Hildenbrand <david@redhat.com>; Aleksandar Rikalo
> <aleksandar.rikalo@syrmia.com>; Stafford Horne <shorne@gmail.com>;
> Jiaxun Yang <jiaxun.yang@flygoat.com>; Marek Vasut <marex@denx.de>;
> Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>; Philippe Mathieu-
> Daudé <f4bug@amsat.org>; qemu-arm@nongnu.org; David Gibson
> <david@gibson.dropbear.id.au>; Sagar Karandikar
> <sagark@eecs.berkeley.edu>; Guan Xuetao <gxt@mprc.pku.edu.cn>; Max
> Filippov <jcmvbkbc@gmail.com>; Aurelien Jarno <aurelien@aurel32.net>
> Subject: [RFC PATCH 6/7] cpu: Move CPUClass::has_work() to TCGCPUOps
>
> diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
> index b0b3040dd13..d597fe12cdf 100644
> --- a/target/hexagon/cpu.c
> +++ b/target/hexagon/cpu.c
> @@ -268,6 +268,7 @@ static bool hexagon_tlb_fill(CPUState *cs, vaddr
> address, int size,
>
> static struct TCGCPUOps hexagon_tcg_ops = {
> .initialize = hexagon_translate_init,
> + .has_work = hexagon_cpu_has_work,
> .synchronize_from_tb = hexagon_cpu_synchronize_from_tb,
> .tlb_fill = hexagon_tlb_fill,
> };
> @@ -284,7 +285,6 @@ static void hexagon_cpu_class_init(ObjectClass *c,
> void *data)
> device_class_set_parent_reset(dc, hexagon_cpu_reset, &mcc-
> >parent_reset);
>
> cc->class_by_name = hexagon_cpu_class_by_name;
> - cc->has_work = hexagon_cpu_has_work;
> cc->dump_state = hexagon_dump_state;
> cc->set_pc = hexagon_cpu_set_pc;
> cc->gdb_read_register = hexagon_gdb_read_register;
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
- [RFC PATCH 0/7] cpu: Move CPUClass::has_work() to TCGCPUOps, Philippe Mathieu-Daudé, 2021/03/02
- [PATCH 1/7] sysemu/tcg: Restrict tcg_exec_init() to CONFIG_TCG, Philippe Mathieu-Daudé, 2021/03/02
- [PATCH 2/7] sysemu/tcg: Restrict qemu_tcg_mttcg_enabled() to TCG, Philippe Mathieu-Daudé, 2021/03/02
- [PATCH 3/7] target/arm: Directly use arm_cpu_has_work instead of CPUClass::has_work, Philippe Mathieu-Daudé, 2021/03/02
- [PATCH 4/7] target/s390x: Move s390_cpu_has_work to excp_helper.c, Philippe Mathieu-Daudé, 2021/03/02
- [RFC PATCH 5/7] cpu: Declare cpu_has_work() in 'sysemu/tcg.h', Philippe Mathieu-Daudé, 2021/03/02
- [RFC PATCH 6/7] cpu: Move CPUClass::has_work() to TCGCPUOps, Philippe Mathieu-Daudé, 2021/03/02
- [PATCH 7/7] target/arm: Restrict arm_cpu_has_work() to TCG, Philippe Mathieu-Daudé, 2021/03/02