Re: [PATCH 0/2] hw/misc/tmp105: Correct temperature limit check logic

[Peter Maydell]

Ping for code review? Might be nice to have in 5.2, though given
how old the bug is it's scarcely critical...

Ccing the ASPEED maintainers since that's the only other
machine that uses the tmp105.

thanks
-- PMM

On Tue, 10 Nov 2020 at 15:00, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> This patchseries fixes bug https://bugs.launchpad.net/qemu/+bug/1734474
> which is a regression between QEMU 1.3.0 and 1.4.0 of ability to boot a
> guest image on the n800 machine.  The regression was introduced by
> commit cb5ef3fa1871522a08, which fixed a logic error in the tmp105
> device's handling of i2c writes.  That commit is correct, but it exposed
> an underlying bug in the tmp105 implementation.  Previously, we
> accidentallywrote 0 to the config register when this guest tried to
> write 0x36, which meant (among other things) that we left the device
> in "comparator mode" rather than putting it into "interrupt mode" as
> the guest wanted, and it turns out that our interrupt-mode logic was
> buggy, so we would signal an over-temperature interrupt immediately
> and continuously, and the guest would hang.
>
> Patch 1 fixes a silly omission where we weren't setting the
> reset values for the T_high and T_low limit registers.
> Patch 2 fixes the interrupt mode limit checks.
>
> With these two the n9800 image linked to in the bug report can
> boot properly again.
>
> thanks
> -- PMM
>
> Peter Maydell (2):
>   hw/misc/tmp105: reset the T_low and T_High registers
>   tmp105: Correct handling of temperature limit checks
>
>  hw/misc/tmp105.c | 73 ++++++++++++++++++++++++++++++++++++++++++------
>  hw/misc/tmp105.h |  7 +++++
>  2 files changed, 71 insertions(+), 9 deletions(-)