Re: [PATCH 14/14] target/arm: enable Secure EL2 in max CPU

[Richard Henderson]

On 11/2/20 11:38 PM, Rémi Denis-Courmont wrote:
> Answering my own patch as I have a policy question here...
> 
> This exposes SEL2 without TTST (small translation tables). On a logical 
> level, 
> the two extensions are orthogonal. But per DDI0487, SEL2 implies TTST, so I 
> am 
> not sure if this is considered an acceptable deviation in QEMU, or if 
> implementing TTST is deemed necessary.

We should implement TTST, yes.  I don't think we need to be 100% strict on the
ordering, so long as they are both done for the next qemu release in the
spring.  I don't think it should be difficult.

FWIW, we left aarch32 fp16 unimplemented for quite some time, even though that
was required for full compliance with aarch64 fp16.

> Note that there's what seems like an editorial error in the spec: VSTCR 
> documentation covers the scenario that TTST is not supported by the CPU, even 
> though then VSTCR should not exist.

Indeed.  ;-)


r~